FUNAI DRVR-B778 - Page 27

1-11-2
Digital Signal Process Block Diagram
E9712BLD
IC601 (MPEG2 AV CODEC)IC201
IC204
FRONT-END DIGITAL SIGNAL PROCESS
IC101
RF/ ERROR AMP
IC402
MOTOR DRIVER
MOTOR DRIVER
IC410
OP AMP
SDRAM
IC401
IC604 (FLASH MEMORY)
DVD MAIN CBA
TO VIDEO OUTPUT SELECT BLOCK DIAGRAM TO VIDEO INPUT SELECT BLOCK DIAGRAM TO AUDIO INPUT/ OUTPUT SELECT BLOCK DIAGRAM
SPDIF
BCK
DATA
LRCK
MD MC
SCK
MS
BCK
DATA
LRCK
SYSCLK
E20
H18
K18
H19
G19
W17
T20
N19
M19
V4
W4
V3
U20 H20
G20
F20
P19
VIDEO-Y(I/P)
VIDEO-C
VIDEO-Cb/Pb
VIDEO-Cr/Pr
VIDEO-Y/CVBS
VIDEO-C
IC202
FLASH MEMORY
D/A D/A D/A D/A
AUDIO I/F
VIDEO ENCODER
BACK-END DIGITAL SIGNAL PROCESS
VIDEO I/F
FLASH MEMORY
FE ENCODER
TRAY OPEN
IC602,IC603 (DDR SDRAM)
DDR SDRAM
CN101
DVD MECHANISM
TILT TRACKING FOCUS
PICK -UP
SLED MOTOR
M
REC VIDEO SIGNAL PB VIDEO SIGNAL REC AUDIO SIGNAL PB AUDIO SIGNAL
LOADER CBA
ENCODER CBA
IC102
LPC
V15
VIDEO DECODER
CN1001
CN1003
SPINDLE MOTOR
M
CN1002
RELAY CBA
CN401
+3.3V
J18
VIDEO-Y(I)
D/A
www.freeservicemanuals.info
Digitized in Heiloo Netherland