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Guildline 6675A - Page 114

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Section 4
4-28
4.3.3.1. Voltage To Current (V/I) Converter.
The input signal is converted into a current by an op amp U11, resistors R10-R13,
R16, and R17. The op amp is configured as a bilateral current source with an offset
current added in (via a -1.5 V reference source) so that bipolar input signals can be
accommodated.
4.3.3.2. High Speed Low Noise Current Buffer.
This consists of Q3 and Q4 configured as a darlington cascade amplifier. This
amplifier is needed to isolate the DC part of the circuit (the V/I converter) from the
high speed part of the circuit (the integrator).
4.3.3.3. Precision References.
U13 is used to generate a stable -7 V, 10 mA power supply, and as well it is divided
down and buffered by U12 to provide a -1.5 V power supply. A -5.5 V tap is also
provided by U13 which is used as a sense voltage in the precision current sink.
4.3.3.4. Precision Current Sink.
This is generated by op amp U21, dual gate MOSFET U20, and R35, an ultrastable
resistor. The dual gate MOSFET is the ideal current sink as it provides very high
isolation between the fast switching that is occurring at its drain and the DC current
that is generated at its source.
4.3.3.5. Current Mode Switch.
U18 and U19 are a matched transistor pair. A matched pair was used so that
self-heating effects on current gain would not be a problem. Both sides of the
current switch are run at the same power levels, so that no matter what side is
conducting, the heating effect on the transistor package is the same.
The matched pair U18 and U19 experience close to a one hour warmup drift as it
comes up to temperature, but this is an effect that "divides itself out" in the
calculation of the input signal level.
4.3.3.6. Start/Stop Integrator Switch.
This consists of U17, a DMOS switch, CR3, a fast silicon diode, and Q5, a fast pnp
switch. Q5 is used to translate HCMOS logic levels into +5 V, -6 V gate drive
signals for the DMOS switch. A DMOS switch was chosen because of its ultrafast
gating, low drain node capacitance and low charge injection from the gate.