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Guildline 6675A - Page 116

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Section 4
4-30
4.3.3.12.A/D Trigger.
This consists of 1/2 of U5, a one shot, which generates a 1 s trigger pulse to start
the 12-bit A/D converter. This trigger pulse occurs about 30 s after the integrator
has been halted, so that the output of U15, the integrator buffer, has settled to better
than 0.01% of its final value.
4.3.3.13.12 BIT A/D Converter.
This consists of U10, a 12-bit A/D converter. Its internal 6.3 V reference is used to
set the limit point of the integrator. Its serial clock and serial data lines are used to
send data to the processor via optocouplers located on the processor board.
As well, the status signal line is used to generate an interrupt to the processor (again
via an optocoupler) once the 12-bit conversion is done.
4.3.4. Nanovolt Detector Input Amplifier PCB (19503.01.02)
The analog amplifier PCB consists of the following functional blocks:
a) High Input Impedance Low Noise Amplifier.
b) Input and Range Selection.
c) Charge Pump.
d) Power Supplies.
e) Overload Protection.
It will be helpful to refer to Amplifier/Attenuator Schematic 19503.01.04 for the following
circuit descriptions.
4.3.4.1. High Input Impedance Low Noise Amplifier.
Q300 is a matched FET pair that is used in a differential mode to provide the high
impedance front end for the amplifier. R301 and R302 act as the loads for Q300.
R300 is used to trim the offset. Q302 together with R303, R304, DS300, and C301
provide the current sink for Q300.
U300 provides most of the gain for the amplifier. The output of U300 is fed directly
to the A/D PCB, as well as to the resistor network R306-R311 which provides
feedback to the differential pair Q300.