3
AT24C01A/02/04/08A/16A
5092B–SEEPR–9/05
The AT24C08A only uses the A2 input for hardwire addressing and a total of two 8K
devices may be addressed on a single bus system. The A0 and A1 pins are no
connects.
The AT24C16A does not use the device address pins, which limits the number of
devices on a single bus to one. The A0, A1 and A2 pins are no connects.
WRITE PROTECT (WP): The AT24C01A/02/04/08A/16A has a Write Protect pin that
provides hardware data protection. The Write Protect pin allows normal read/write oper-
ations when connected to ground (GND). When the Write Protect pin is connected to
V
CC
, the write protection feature is enabled and operates as shown in the following
table.
Memory Organization AT24C01A, 1K SERIAL EEPROM: Internally organized with 16 pages of 8 bytes each,
the 1K requires a 7-bit data word address for random word addressing.
AT24C02, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each,
the 2K requires an 8-bit data word address for random word addressing.
AT24C04, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each,
the 4K requires a 9-bit data word address for random word addressing.
AT24C08A, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each,
the 8K requires a 10-bit data word address for random word addressing.
AT24C16A, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes
each, the 16K requires an 11-bit data word address for random word addressing.
Table 2. Write Protect
WP Pin
Status
Part of the Array Protected
24C01A 24C02 24C04 24C08A 24C16A
At V
CC
Full (1K) Array Full (2K) Array Full (4K) Array Full (8K) Array Full (16K) Array
At GND Normal Read/Write Operations
DVD47 harman/kardon
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