Harman Kardon HD7725 - Page 16

ile
TERMINAL
PORT
TERMINAL
vO
OUTLINE
OF
FUNCTIONS
NUMBER
| NUMBER
NAME
CODE
1 +VIN 1 i Positive input terminal 1 for amp. 1.
2
-VIN
1
I
Negative
input
terminal
1
for
amp.
1.
3 OUT 1 Qo Output tarminal 1.
4 OUT 2 ° Output terminal 2.
5 -VIN 2 l Negative input terminal 2 for amp. 2.
IC103
6
+VIN
2
|
Positive
Input
terminal
2
for
amp.
2.
7
+VIN 3
|
Positive
input
terminal 3
for
amp. 3.
&
-VIN
3
i
Negative
input
terminal
3
for
amp.
3.
9
OUT
3
ie}
Output
terminal 3.
10
NC
:
14
NC
12
Veo
:
Positive
power
supply.
1
EMP
Qa Emphasis
code
output.
Emphasis
=
"1"
2
PWM1
Q
Disc
motor
dirve
PWM
output
1.
-
3
PWM2
{eo} Disc
motor
drive
PWM
output
2.
+
4
DOTX
oO
Digital
output.
6
ACRCY
l
Channel
status
clock
input.
6
TEST1
|
Test
mode
select
input.
7
DOBSEL
l
Qutput
data
bit
select.
8
DASEL1
l
O/A
converter
interface
select
input
1.
9
DASEL2
l
D/A
converter
interface
select
input
2.
10
DASEL3
I
D/A
converter
interface
select
input
3.
W
DASEL4
|
D/A
converter
interface
select
input
4.
12
MSD
i
Microcomputer
interface
serial
data
input.
13
MCK
t
Microcomputer
interface
shift
clock
input.
14
MLA
I
Microcomputer
interface
data
latch
clock
input.
15
ACLR
I
Microcomputer
interface
register
clear
input.
16
HED
I
Play
signal
absence
signal
input.
17
HF
1
Play
signal
input.
18
IREF
I
Detection/PLL
circuit
reference
current
input.
19
TLC
ce) Slice
level
contro!
output.
20
LPF
VO PLL
loop
filter
connection
terminal.
21
LOCK/DRD
ie]
nchronous/low
disc
rotate
status
output.
22
SYCLK
°
Frame
synchronous
status
output,
23
VDD2
I
5V
power
supply
used
for
Detection/PLL
circuit
analog
area
only.
\e201
24
DAD
ie]
Low
disc
rotate
status
output.
25
EFFK
ie}
EFM
frame
clock
output.
26
SCINT
ie)
Subcode
Q
interrupted
signal
output.
27
SQRO
is]
Subcode
Q
register
output.
28
SQRCK
|
Subcode
Q
register
data
shift
clock
input.
29
SCOR
ie}
Subcode
synchronous
signal
output.
30
CRCF
{eo}
Subcode
Q
CRC
check
result
output.
31
SCCK
l
Shift
clock
input
for
serial
subcode
data
output.
32
VSS2
l
GND
terminal.
33
SCOE2
i
Subcode
parallel
output
channel
P
to
S
enable
input.
34
SCOE1
l
Subcode
parallel
output
channel
T
to
W
enable
input.
36
SBCW
ie]
Subcode
channel
W
output.
36
SBCV
ie)
Subcode
channel
V
output,
37
SBCU
ie)
Subcode
channel
U
output.
38
SBCT
ie}
Subcode
channel
T
output.
39
SBCS
ie}
Subcode
channel
S
output.
40
SBCR
ie]
Subcode
channel
R
output.
41
SBCQ
ie]
Subcode
channel
Q
output.
42
SBCP
QO
Subcode
channel
P
output.
43
RAS
RTI
ie]
Row
address
strobe
signal
output.
44
TEST
2
TEST
2
1
Test
mode
select
input.
45
RDB2
AT2
vo
External
memory
data
/O
2.
46
NG
5
47
RT3
VO
Extemal
memory
data
/O
1.
48
RT4
vO
Extemal
memory
data
/O
4,
49
RTS
ie)
Column
address
strobe
signal
output.
50
RTs
vo
Extemal
memory
data
I/O
3.
51
RI7
ie]
Write
enable
signal
output.
52
RIB
|
Exteral
memory
address
output
7.
§3
RTg
ie}
External
memory
address
output
1.
54
RT10
ie]
External
memory
address
output
2.
15