Heathkit IO-4550 - Page 21

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Page 19
TRIGGER, SWEEP, AND CONTROL
On command from a trigger pulse, the horizontal time base
circuits generate a linear ramp signal (sweep) to drive the
CRT horizontal deflection plates and move the dot across
the screen at a constant rate. In the automatic triggering
mode, if no trigger is present, the time base circuits free-run
and generate an auto-baseline. An oscillator provides the
vertical signal chop rate when two traces are displayed in the
chop mode (TIME/CM_sweep rate is 5 mS_and_ slower).
Figure 11 shows a typical, two trace, chopped display that
has been exaggerated for clarity.
When a trigger pulse of sufficient amplitude is present, the
trigger comparator outputs change logic and a trigger signal
Passes through the slope selector gate. The signal from the
gate turns on the sweep control and allows the time
capacitor to be charged through the “bootstrap” constant
current source. The charging of the capacitor produces a
linear ramp signal that is coupled through the voltage
follower to the horizontal deflection circuits.
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The ramp signal is also coupled to the sweep end circuit.
When the ramp reaches a preset voltage level, set by the
Sweep Length control, the sweep end circuit triggers the
blanking flip-flop and sweep end monostable. The sweep end
monostable insures that retrace will not occur until after the
CRT has blanked.
TRIGGER
In the automatic triggering mode, the trigger circuit
examines the trigger signal for a proper trigger point. If the
signal is large enough, the sweep circuit is activated by the
trigger. If the signal is insufficient or absent, the sweep
circuits are allowed to free run.
Depending on the desired trigger mode, one of four sources
can be selected by the Trig switch: External Trigger,
Channel Y1 Trigger, Channel Y2 Trigger, or Line Sync. The
Channels Y1 and Y2 Trigger signals are provided by the
vertical preamplifier trigger circuits; while the Line Sync
signal is tapped directly off of one side of the 6-volt
transformer winding. The External Trigger signal is coupled
through FET follower Q201/Q202 to the Trig switch.
Transistors ZD201 and ZD202 function as reverse-biased
zener diodes to limit the signal level to the input of Q201.
FET Q202 is a constant current source.
The trigger signal is coupled from the Trig switch, through
the Trig Mode switch, to the pin 5 input of differential
trigger comparator IC201. The trigger comparator compares
the trigger voltage at pin 5 to the reference voltage at pin 4.
If the trigger voltage is greater than the reference voltage,
the noninverting output (pin 11) is at a logic high* and the
inverting output (pin 10) is low. When the trigger voltage
goes lower than the reference voltage, the comparator
outputs will switch levels; the noninverting output will go
low and the inverting output will go high. Thus, each trigger
pulse, of sufficient amplitude, is converted to a logic pulse.
In both “auto” and “normal” operation, Level control R213
adjusts the reference voltage level (Diodes D205 and D206
set the range of the control to approximately +0.7 volts).
The complementary trigger comparator output is coupled to
+ slope selector gate 1C202. (Feedback resistors R209 and
R211 supply circuit hysteresis so that the comparator will
not switch on Noise pulses.)
“A logic high (1) is greater than 2.4 volts DC, but less than
5.5 volts DC. A logic low (0) is less than or equal to 0.8 volts
OC.