Hitachi 57F59A - Page 57

CH U/D, INPUT
A
DJUST MODE
VBI SLICER
V CHIP
CLOCK TEST
AFC TEST
OSD POSITION
ISF MODE
I2C OPEN
▶
MAINTENANCE
MEMORY INIT
A
EXIT
Select or
▶
CH U/D, INPUT
A
DJUST MODE
VBI SLICER
V CHIP
CLOCK TEST
AFC TEST
OSD POSITION
ISF MODE
I2C OPEN
MAINTENANCE
▶
MEMORY INIT
▲▼
▲▼
(Cyan)
▲▼
Press
▶
for 2 sec
(Green)
Finish
▲▼
CH U/D, INPUT
A
DJUST MODE
VBI SLICER
V CHIP
CLOCK TEST
AFC TEST
OSD POSITION
ISF MODE
▶ I2C OPEN

MAINTENANCE
MEMORY INIT
EXIT
Select or
▶
A
DJUST MODE
VBI SLICER
V CHIP
CLOCK TEST
AFC TEST
OSD POSITION
ISF MODE
▶ I2C OPEN
5
MAINTENANCE
MEMORY INIT
2.16 Adjustment OSD Flowchart (Cont.)
DP65
56
DP55