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Hitachi AP1 - Page 110

Hitachi AP1
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HMCS4
7C(HD44860)
,----
HMCS47CL(HD44868)
The
HMCS47C
is
the
CMOS
4·bit single chip microcomputer
which contains
ROM, RAM,
I/O and Timer/Counter on single
chip. The
HMCS47C
is
designed
to
perform efficient controller
function
as
well
as
arithmetic function for
both
binary and
BCD
data. The
CMOS
technology
of
the
HMCS47C
provides the
flexibility
of
microcomputers for battery powered and battery
back·up applications.
FEATURES
4-bit
Architecture
4,096 Words
of
Program ROM and Pattern ROM (10
bitslWord)
256 Digits
of
Data RAM
(4
bits/Digit)
44
I/O
Lines and 2 External
Interrupt
Lines
Timer/Counter
Instruction Cycle Time;
HMCS47C :
5Jls
HMCS47CL : 20Jls
All
Instructions except One Instruction; Single Word
and
Single Cycle
BCD
Arithmetic
Instructions
Pattern Generation Instruction
- Table Look Up Capability -
Powerful
Interrupt
Function
3
Interrupt
Sources
~2
External
Interrupt
Lines
LTimer/
Counter
Multiple
Interrupt
Capability
Bit
Manipulation Instructions for Both RAM and
I/O
Option
of
I/O
Configuration Selectable on Each Pin;
With
Pull
up
MOS
o~
CMOS
or
Open Drain
HMCS47C, HMCS47CL
(FP-54)
HMCS47C, HMCS47CL
(DP·64S)
----
Built·in Oscillator
PIN
ARRANGEMENT
O.
~
0
0,
Built·in
Power·on
Reset
Circuit
(HMCS47C
only)
Low
Operating Power Dissipation; 3.3mW typo
Stand-by Mode (Halt Mode);
66
JlW
max.
CMOS Technology
Single
Power Supply;
HMCS47C 5V±10%
HMCS47CL : 2.5V
to
5.5V
o~oo~o~o'
1\
U
Z
~
.. - 0
v 0
0010
HMCS47C
HMCS47CL
(Top View)
108
0,
~
0,
O.
~
0,
0,
~
1
D.
O.
~
A.,
O.
8
<NC>
:
~~
~i
~~g~
< NC
>~
A.,
O,.E
A.,
0,,"
A.
o
0,,'2
A"
0"
1
An
0,.'
1
All
0"
1
A,.
A
••
' HMCS47C
A"
A.,'
HMCS47CL
A12
A.,1
All
A.,1
A,.
As.
INT,
A"
1
INT.
An
A"
A"
All
RESET , <
NC
>
< NC > <
NC
>
< NC >
<NC>
GNO 7
A"
asc,
7
A,.
asc,
A.,
HIT
A.,
TEST~
A.,
Vee
-i2
_______
--'r-
A
o.
(Top View)