Hitachi AP1 - Page 111

--------------------------------------------------------HMCS47C,HMCS47CL
• BLOCK DIAGRAM
ROM
4.096 x 10 bit
(program memory and
pattern memory)
{f>.
PC (12 bit)
11
1;
~
Stack Register
(4x 12 bit)
~
A
B
X
Y
in,
SPX
Spy
n
addressing
Timer/Counter
I
~
l
l
Inter-
RAM
rupt
256x4 bit
~
109
<i
5!a;
a;1
,...
~
s. rr.'"
a;1
(
r --
------
,
I
,
I
R5
,
,
,...
I-
-------------,
I
I
I
R4
I
I
I
L __
------
-- ---,
I
~~
Instruction
Decoder
-
S(
-r-
ljA
::::l
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c:
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A
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c.
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,
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2r
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,
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~ ~I
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: a:
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,
,
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,
,
ii
,
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,
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,
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I
,
,
,
r--
,
0
:
,
a;1
, ,
'-----
-'
.---
r---
r.:..::.----
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ii
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!:!
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0
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,
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:-
,
jf ____ J
C>
c:
~
-
-c
-
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--
(I)
(I)
::::l
::::l
al
al
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en
-
CIl
Et-
'-
~B=
r-----,
,
~ ____ J I/O Common
( J
J
R,o
-R
ll
)
R,o
-R"
\
f-o
f-o
f-o
f-o
Do
0,
0,
Oil
0,.
0"
Vee
GND
--OR ESET
--01
OSC,
OSC,
f-o
• Power-on Reset Circuit
(ACL)
is not built in HMCS47CL.