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Hitachi AP1 - Page 139

Hitachi AP1
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LCD-
IIHHD44790,HD44795)-
The LCD-III
is
the
CMOS
4-bit single chip microcomputer
which contains
ROM,
RAM,
I/O, Timer/Event Counter and
Control Circuit, Direct
Drive
Circuit for
LCD
on
single
chip.
The LCD-III
is
designed
to
drive
LCD
directly and perform
efficient controller function
as
well
as
arithmetic function for
both binary and
BCD
data. With the on-chip crystal oscillator
for timer, the clock function
is
easily realized. The
CMOS
technology
of
the LCD-III provides the flexibility
of
microcom-
puters for battery powered and battery back-up applications
in
combination with low power consuming
LCD.
FEATURES
4-bit Architecture
2,048
Words
of
Program
ROM
(10 bitslWord)
128 Words
of
Pattern
ROM
(10 bitslWord)
160 Digits
of
Data
RAM and Display
Data
RAM (4 bits/
Digit)
Control Circuit
and
Direct Drive Circuit
for
LCD
4 Commons (Duty Radio;
Static, 1/2, 1/3, 1/4)
32
Segments
(Externally expandable up to
96
Segments
using external Drivers HD44100s)
32
I/O
Lines
and
2 External Interrupt Lines
Timer/Event Counter
All
Instructions except
One
Instruction; Single Word
and
Single Cycle
BCD
Arithmetic Instructions
Pattern Generation Instruction
- Table Look Up Capability -
Powerful Interrupt Function
3
Interrupt
Sources
~
2 External Interrupt Lines
L Timer/Event Counter
Multiple
Interrupt Capability
Bit
Manipulation Instructions for Both RAM
and
I/O
Option
of
I/O
Configuration Selectable on
Each
Pin; Pull
Up
MOS
or
CMOS
or
Open
Drain
Built-in Oscillator for System Clock (Resistor or Ceramic
Filter)
Built-in Crystal Oscillator
for
Timer
Built-in Power-on
Reset
Circuit
Low Operating
Power
Dissipation;
2mW
typo
Stand-by Mode (Halt Mode); 50IlW max.
2 Versions; HD44790 VCC = 5V ±
10%,
10llS Instruction
Cycle Time
HD44795 VCC
= 2.7V
to
5.5V,
20lls
Instruc·
tion Cycle Time
LCD·1I1
(FP·80)
PIN
ARRANGEMENT
137
.:
c
~
=
~
,
~
~
~
~
z
::I
::I
~
..
:;:
II
;;
LCD-III
OOCOQooJ~6&g~JJJI
6
.5
(Top View)
2 SEG,
1 SEG,
COM.
COM,
COM,
1 COM,
V,
I
V,