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Hitachi AP1 - Page 176

Hitachi AP1
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LCD-
N(HD613901
)----
The
LCD·IV
is
the
CMOS
4·bit single chip microcomputer
which contains
ROM, RAM,
I/O, Timer/Event Counter and
Control Circuit, Direct
Drive
Circuit for
LCD
on
single
chip.
The
LCD·IV
is
designed to drive
LCD
directly and perform
efficient controller function
as
well
as
arithmetic function for
both binary and
BCD
data. With the on-chip crystal oscillator
for timer, the clock function
is
easily realized. The
CMOS
technology
of
the LCD·IV provides the flexibility
of
microcom·
puters
for
battery powered and battery back·up applications
in
combination with low power consuming
LCD.
FEATURES
4·bit
Architecture
4,096 Words
of
Program ROM (10 bitslWord)
256
Digits
of
Data RAM and Display Data RAM (4 bits/
Digit)
Control Circuit and Direct Drive Circuit
for
LCD
4 Commons (Duty Ratio;
Static, 1/2, 1/3, 1/4)
32 Segments (Externally expandable up
to
96
Segments
using external Drivers HD44100Hs)
32 I/O Lines and 2 External Interrupt Lines
Timer/Event Counter
All
Instructions except One Instruction; Single Word and
Single Cycle
BCD Arithmetic Instructions
Pattern Generation Instruction
- Table Look Up
Capability--
Powerful Interrupt Function
3 Interrupt Sources
I- 2 External Interrupt Lines
L Timer/Event Counter
Multiple Interrupt Capability
Bit
Manipulation Instructions
for
Both RAM
and
I/O
Option
of
I/O
Configuration Selectable on
Each
Pin; Pull
Up
MOS
or
CMOS or Open Drain
Built·in Oscillator
for
System Clock (Resistor
or
Ceramic
Filter)
Built·in Crystal
Oscillator
for
Timer
Low
Operating Power Dissipation
Stand·by Mode (Halt Mode)
2 Versions;
Vee
= 5V ±
10%,
5
lIS
I nstruction Cycle
Time
Vee
= 2.5V
to
5.5V, 20 lIs Instruction
Cycle
Time
174
LCD·IV
(FP-80)
PIN
ARRANGEMENT
LCD-IV
QdQQOQQ6~66g8JJJJ
tS
ti
(Top View)