--------------------------------------------------------------------LCD-IV
it is possible
to
jump
to
an address only
in
the Bank
1,
not to
an
address in the Bank
O.
Bank 0 depending on the value
of
the operand
P2.
TBR instruction
is
executed regardless
of
the Status F
IF,
and
does not affect the
Status F
IF.
If
the address where TBR instruction exists
is
in
the Bank 0,
it
is
possible
to
jump
to
an address in either the Bank 1
or
the
Data 1/0
Register
Branch
to
Bank 0
•
LAI
15
r--LRA
7
~-.LPU
5
~
BR
3F)
•
LAI
LBA
r--LRA
: COMB
'-·LPU
BR
15
Branch
to
Ban~
1
LAI
0
~--
LRA
7
"·LPU
15
BR 3F
LAI
0
LTA
--LRA
7
LVI
2
XMA
-·LPU
10
>
BR
2E
-'
0.-0.
ROM
I :
B>:
I : : : : : I
~ ~
~
~ ~
I
PC
\
Bank Part
Figure 6
BR
Operation
R70
=
"1"
(R
70
=
"0")
BRL
5·3F
(Branch
to
Bank 0 5·3F (5-3F))
R70
=
"1"
(R,o =
"0")
BRL
31·3F
(Branch
to
Bank 0 31·3F (31·3F))
R70
=
"0"
(R,o =
"1")
BRL
15·3F
(Branch
to
Bank 1 15·3F (47·3F))
R,O
=
"0"
(R
70
=
"1")
BRL
10·2E
(Branch
to
Bank 1 lQ.2E (42·2E))
Figure 8
BRL
Example
0
5
-0.
Delay by 1 Instruction Cycle
Time
: I :
: I
I
Bank Part
Figure 7 LPU Operation
191
Table 4 Bank Part
Truth
Table
of
TBR Instruction
PC
..
P2
Bank Part
of
PC
after
TBR
1
1 (Bank 1)
1 (Bank 1)
0
1 (Bank 1)
1
1 (Bank 1)
o (Bank 0)
0
o (Bank 0)
• SUBROUTINE JUMP
There are two types
of
subroutine jumps. They are explained
in
the following paragraphs.
•
CAL
By
CAL instruction, subroutine jump to the Subroutine
Space
is
performed.
The Subroutine
Space
is
the Bank
00
Page
(0 Page).
The address next
to
CAL instruction address
is
pushed onto
the
Stack STl and the contents
of
the stacks STl , ST2 and ST3
are pushed onto the stacks ST2, ST3 and ST4 respectively
as
shown in Figure 10.
The bank part
of
the program counter becomes the Bank 0
and the page part becomes the 0 Page. The lower 6 bits (operand
a,
06
to
01)
of
the
ROM
Object Code
is
transferred to the
address part
of
the program counter.
The
LCD-IV has 4 levels
of
stack
(STl,
ST2,
ST3
and ST4)
which allows the programmer
to
use
up
to
4 levels
of
subroutine
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