Hitachi AP1 - Page 312

HMCS404AC--------------------------------------------------------------------------
$000.0
lIE I-------------r,
Sequence Control
· Push PCtCA/ST
$001.0
$001.2
$003.0
· Rese. IIf
· Jump to Vector
Address
Priority Control
PLA
Fig.6 Interrupt Circuit Block Diagram
Table 1. Vector Addresses and I nterrupt Priority
Reset, Interrupt
Priority
Vector
addresses
RESET -
$0000
INTo
1 $0002
INTI 2 $0004
TIMER-A
3
$0006
TIMER-B 4 $0008
SERIAL 5
$OOOC
Table 2. Conditions of Interrupt Service
Address
~
Interrupt source
INTo
INTI TIMER-A
TIMER-B
control
bits
I/E
1
1 1 1
IFO·IMO
1
0 0 0
IF1 ·IM1
*
1 0
0
IFTA
·IMTA
* *
1
0
IFT-B· IMTB
*
*
*
1
IFS ·IMS
* *
*
*
310
SERIAL
1
0
0
0
0
1
• Don't care