Hitachi AP1 - Page 85

-----------------------------------------------------HMcS46c,HMcS~CL
• BLOCK DIAGRAM
ROM
4.096 x 10 bit
(program memory and
Pattern memory)
<"r
PC (12bitl
ft
~1
Stack Register
(4 x
1·2 bit)
~
A B X
In,
SPX
IT
I
Timer/Counter
1
/"
I
/j
~
Inter-
rupt
l
.
R5
~7
Instruction
Decoder
Jll
-!1=
-
~[J A
...
:::>
...J
<{
A-
Y
'---~
Spy
..: ~ddressin~ '7
f--
c
0
.~
RAM
:;
256x 4 bit
0.
'c
~~
.
R4 and R6 can be used
as general purpose registers •
•• Power-on Reset Circuit (ACL)
is not built in HMCS46CL.
83
R4
11
VI
:::>
OJ
t:l
.
r-----
,
rP12L
,
~
,-v)l...j
,
,
~
,
,
,
I a:
'J I
,
,'-
,
,
I
,
, ,
,
a:
,
,
,
,
I
,
,
,
, ,
, ,
,....--J
,
~[
,
,
,
I
,
~
.J
0-;:":'---
.,
,
,
,
ii
I
,
~
,
,
J:
,
U
I
..
I
0
I
I
,
I...-
,
Jr---.J
'"
c
.~
-
-c
-
~
-
VI
:::>
-
OJ
Vi
g
ACL
B=
r
----~
, ,
:J
l
\
)
R,.
-R"
R,.
-R"
D.
0,
0,
-0
0
0
~V
cc
NO
~G
~H
LT
~T
--OR ESET
0
SC,
~O
SC,
: : I/O Common
'- ____ .J