Holtek HT66F20 - Page 140

Rev. 2.50 140 June 22, 2017 Rev. 2.50 141 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Single Pulse Mode
Toselectthismode,bitsTnM1andTnM0intheTMnC1registershouldbesetto10respectively
andalsotheTnIO1andTnIO0bitsshouldbesetto11respectively.TheSinglePulseOutputMode,
asthenamesuggests,willgenerateasingleshotpulseontheTMoutputpin.
ThetriggerforthepulseoutputleadingedgeisalowtohightransitionoftheTnONbit,whichcan
beimplementedusingtheapplicationprogram.HoweverintheSinglePulseMode,theTnONbit
canalsobemadetoautomaticallychangefromlowtohighusingtheexternalTCKnpin,whichwill
inturninitiatetheSinglePulseoutput.WhentheTnONbittransitionstoahighlevel,thecounter
willstartrunningandthepulseleadingedgewillbegenerated.TheTnONbitshouldremainhigh
whenthepulseisinitsactivestate.Thegeneratedpulsetrailingedgewillbegeneratedwhenthe
TnONbitisclearedtozero,whichcanbeimplementedusingtheapplicationprogramorwhena
comparematchoccursfromComparatorA.
HoweveracomparematchfromComparatorAwillalsoautomaticallycleartheTnONbitandthus
generatetheSinglePulseoutputtrailingedge.InthiswaytheCCRAvaluecanbeusedtocontrol
thepulsewidth.AcomparematchfromComparatorAwillalsogenerateaTMinterrupt.Thecounter
canonlyberesetbacktozerowhentheTnONbitchangesfromlowtohighwhenthecounter
restarts.IntheSinglePulseModeCCRPisnotused.TheTnCCLRandTnDPXbitsarenotusedin
thisMode.
 
 




  

     
 




  

    
     
 
   
Single Pulse Generation