Holtek HT66F20 - Watchdog Timer; Watchdog Timer Clock So�Rce; Watchdog Timer Control Register

Rev. 2.50 68 June 22, 2017 Rev. 2.50 69 June 22, 2017
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
HT66F20/HT66F30/HT66F40/HT66F50/HT66F60
HT66FU30/HT66FU40/HT66FU50/HT66FU60
A/D Flash MCU with EEPROM
Watchdog Timer
TheWatchdogTimerisprovidedtopreventprogrammalfunctionsorsequencesfromjumpingto
unknownlocations,duetocertainuncontrollableexternaleventssuchaselectricalnoise.
Watchdog Timer Clock Source
TheWatchdogTimerclocksourceisprovidedbytheinternalclock,f
S
,whichisinturnsuppliedby
oneoftwosourcesselectedbycongurationoption:f
SUB
orf
SYS
/4.Thef
SUB
clockcanbesourced
fromeithertheLXTorLIRCoscillators,againchosenviaaconguration option.TheWatchdog
Timersourceclockisthensubdividedbyaratioof2
8
to2
15
togivelongertimeouts,theactualvalue
beingchosenusingtheWS2~WS0bitsintheWDTCregister.TheLIRCinternaloscillatorhasan
approximateperiodof32kHzatasupplyvoltageof5V.
However,itshouldbenotedthatthisspeciedinternalclockperiodcanvarywithV
DD
,temperature
andprocessvariations.TheLXToscillatorissuppliedbyanexternal32.768kHzcrystal.Theother
WatchdogTimerclocksourceoptionisthef
SYS
/4clock.TheWatchdogTimerclocksourcecan
originatefromitsowninternalLIRCoscillator,theLXToscillatororf
SYS
/4.Itisdividedbyavalue
of2
8
to2
15
,usingtheWS2~WS0bitsintheWDTCregistertoobtaintherequiredWatchdogTimer
time-outperiod.
Watchdog Timer Control Register
Asingleregister,WDTC,controlstherequiredtimeoutperiodaswellastheenable/disable
operation.Thisregistertogetherwithseveralcongurationoptionscontroltheoveralloperationof
theWatchdogTimer.
WDTC Register
Bit 7 6 5 4 3 2 1 0
Name FSYSON WS2
WS1 WS0 WDTEN3 WDTEN2 WDTEN1 WDTEN0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
POR 0
1 1 1 1 0 1 0
Bit7 FSYSON:f
SYS
ControlinIDLEMode
0:Disable
1:Enable
Bit6~4 WS2, WS1, WS0:WDTtime-outperiodselection
000:256/f
S
001:512/f
S
010:1024/f
S
011:2048/f
S
100:4096/f
S
101:8192/f
S
110:16384/f
S
111:32768/f
S
ThesethreebitsdeterminethedivisionratiooftheWatchdogTimersourceclock,
whichinturndeterminesthetimeoutperiod.
Bit3~0 WDTEN3, WDTEN2, WDTEN1, WDTEN0:WDTSoftwareControl
1010:Disable
Other:Enable