HP 5245L Service Manual

Model
5245L
2-29.
SEQUENCE.
Figure 2-6
shows
the
counting
sequence for
atypical decimal
counter. Initially
each
binary is in the
'rOt'
(reset)
state
(decimal
count
=
0,
DCBA
=
0000).
The following
action
takes
place
when
a series of input
pulses
is
applied
to the counter.
a. The first
pulse
switches
A to the
'r1't
state
(DCBA
=
0001
=
0 + 0 + 0 +
1
=
1).
b. The
second
pulse
switches
A to the
'r0t'
state;
the
output from A
causes
B to
switch to the
"1"
state
(DCBA
=
0010
=
0 + 0 +2
+ 0
=
2).
c.
The third
pulse
switches A
to the
"1"
state
(ocee
=
0011
=
0 + 0 +2
+
1= 3).
d.
The fourth
pulse
switches A to the
"0"
state;
the
output from
A
switches B to
the
"0"
state;
the output
from
B
switches both
D
and C
to
the
"1"
state;
the
resulting
signal fromCis
apptied
toBand D
to return
B tothe
"1"
state and D
tothett0"
state
(DCBA
=0110).
Although
D is
connected
to C, no
switching
occurs
at
C
as a
result
of the final
switching
of
D
since
C
has
not
fully recovered
from
its recent
switching.
e.
The fifth
pulse
switches
A to the
rr1''
state
(ocga
=
0111
=
0 +2 +
2 +
l= b).
f. The
sixth
pulse
switches A
to the
r'0"
state;
the
output from
A switches
B to the
"0"
state;
the output
from
B
switches
D
to
the
"1"
state
(DCBA
=
1100
=
4+2+0+0=6).
g.
The
seventh
pulse
switches
A to the
"1"
state
(ocga
=
1101
=
4 + 2
+ 0+
1
=
?).
h.
The eighth
pulse
switchesA
tothe
"0"
state;
the
output from
A
switches B to
the
"
1"
state
(OCBA
=
1110=4+2+2+0=8).
i.
The ninth
pulse
switches A to the
r'1't
state
(DCBA
=
1111
=
4
+
2
+2 +
1
=
g).
j.
The tenth
pulse
switches A
to the
"0"
state;
the
output from A
switches
B to the
't0rr
state; the output
from
B
switches D to the
'r0"
state;
the output from D
switches
C to the
,'0,'
state
(DCBA
=
0000). When C
becomes
"0",
e
produces
an outputpulsewhich
serves
as a carrypulse
to
afollowingdecimal
counter
assem-
bly. The counter is
now returned
to
its
original count.
2-30.
RESETTING
TO
ZERO.
The
reset
pulse,
(negative)
is
applied to the
base
of the
"0"
state
tran-
sistors
@,
B, D,
e)
in
each binary
circuit.
If the
''0'r
state transistor is
conducting,
the
pulse
has no
effect;
if
the
"0"
state transistor
is not
conducting,
the
pulse
turns it
on.
Thus the reset
pulse
ensures
that
all
f
our
"0"
state
transistors
are
conducting.
Figure 2-?
indicates a
decimal
counter assembly re-
ceiving
a
reset
pulse.
The
counter is in
the decimal
"4"
state
(OCgA
0110)and
the reset
pulse
returns the
decimal
counter
assembly to
the decimal
"0"
state
(OCee
0000).
Decade dividers
can be reset
as
re-
quired
to
any
desired
state,
since
reset inputs
are
available
at each transistor.
Note
the
difference
be-
tween
a
regular inputpulse
anda
reset
pulse:
a
regu-
lar
input
signal
is
positive,
and causes a conducting
transistor
to cut off;
a
reset
pulse
is negative,
and
causes
a cut-off transistor
to
conduct.
02349-1
Section
tr
Paragraphs
2-29
to 2-30
A. BINARY
CIRCUIT
A
OUTPUT
O-r ?
3sv-l
I
RESET
+
TURNS
ON
ol
INPUT
+
l5V-r
o--J\-
CUTS OFF
THE
CONDUCTING
TRANSISTOR
I
=
CONDUCTING
TRANSISTOR
AFTER
RESET
B.
EQUIVALENT
BLOCK
FOR BINARY
CIRCUIT
INPUT
-JL
C. COUNTER
BLOCK DIAGRAM
/-
BCD WEIGHTING FACTOR-r
t242
INPUT
FEEDBACK
Figure 2-5.
Basic Four
Binary
Counter
2-5

HP 5245L Specifications

General

Brand	HP
Model	5245L
Category	Cash Counter
Language	English