Appendix B. System Address Maps
Input/Output Address Map
The following table lists resource assignments for the I/O address map. Any addresses that are not
shown are reserved.
Table 51 (Page 1 of 2). Input/Output Address Map
Address (Hex) Size (Dec) Description
0000–001F 32 bytes DMA 1
0020–002D
0030–003F
30 bytes Interrupt controller 1
002E–002F 2 bytes Super I/O controller system board Plug-and-Play index/data registers
(index=002E, data=002F)
0040–0043
0050–0053
8 bytes Counter/timer 1
0044–004F
0054–005F
24 bytes General I/O locations—available to ISA bus
0060 1 byte Keyboard controller, data byte (on ISA data bus)
0061 1 byte System port B
0064 1 byte Keyboard controller, command and status byte (on ISA data bus)
0062, 0063,
0065–006F
13 bytes General I/O locations—available to ISA bus
0070, bit 7 write
only
1 bit Enable/disable NMI
0070, bits 6—0 7 bits Real-time clock, address (on ISA bus)
0071 1 byte Real-time clock, data (on ISA bus)
0072–0077 6 bytes Real-time clock, addresses and data
0078 4 bytes General purpose I/O (GPIO)
007C 4 bytes General purpose I/O (GPIO)
0080 1 byte POST checkpoint register during POST only
0080–008F 16 bytes DMA page registers
0090–009F 16 bytes General I/O locations—available to ISA bus
00A0–00B1
00B4–00BF
30 bytes Interrupt controller 2
00B2 1 byte Advanced power management control
00B3 1 byte Advanced power management status
00C0–00DF 32 bytes DMA 2
00E0–00EF 16 bytes General I/O locations—availabe to ISA bus
00F0 1 byte Coprocessor error register
00F1–00FF 15 bytes General I/O locations—available to ISA bus
0170–0177 8 bytes IDE channel 1
01F0–01F7 8 bytes IDE channel 0
0220–0227 8 bytes COM3 or COM4
0278–027F 8 bytes LPT3
0290, 0295, 0296 3 bytes System management chip
02E8–02EF 8 bytes COM3 or COM4
02F8–02FF 8 bytes COM2 (system board)
0338–033F 8 bytes COM3 or COM4
0376–0377 2 bytes IDE channel 1
54 Technical Information Manual
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