IBM Personal System/2 50 - RT;CMOS Address Register and NMI Mask (Hex 0070); RT;CMOS Data Register (Hex 0071)

RT/CMOS Address Register and NMI Mask (Hex 0070)
This register is used in conjunction with the port at hex 0071 to read
and write the RT/CMOS RAM bytes.
Bit Function
7 NMI Mask
6 Reserved
5-0 RT/CMOS RAM Address
Figure 3-9. RTICMOS Address Register and NMI Mask (Hex 0070)
Warning: The operation following a write to hex 0070 should access
port hex 0071; otherwise intermittent malfunctions and unreliable
operation of the RT/CMOS RAM can occur.
Bit7 When this bit is set to 1, the NMI is masked off (the NMI is
disabled). This bit is set to 1 by a power-on reset and is a
write-only bit.
Bité Reserved.
Bits5-0 These bits are used to select RT/CMOS RAM addresses.
RT/CMOS Data Register (Hex 0071)
This port is used in conjunction with the address register at hex 0070
to read and write the RT/CMOS RAM bytes.
Bit Function
7-0 RT/CMOS Data
Figure 3-10. RTICMOS Data Register (Hex 0071)
Model 50 System Board — October 1990 3-13