Integra RDV-1.1 - Page 13

DV-SP1000
BLOCK DIAGRAM-6
AUDIO SECTION-3
A
1
2
3
4
5
BCDEFGH
AUDIO
FILTER
AUDIO
FILTER
AUDIO
FILTER
AUDIO
FILTER
AUDIO
FILTER
AUDIO
FILTER
AUDIO
FILTER
AUDIO
FILTER
RS-232C
CONTROLER
ANALOG_IN
DOWNMIX/MIC
ANALOG_IN
6CH
DIGITAL_IN
OPTICAL
DIGITAL_IN
COAXIAL
IEEE1394
PORT-1
RS-232C
I/O_PORT
UART
PORT
JTAG
PORT
JTAG
PORT
IEEE1394
PORT-2
DAC_PLL
AUDIO
LINE_OUT
AUDIO
LINE_OUT
AUDIO
LINE_OUT
AUDIO
LINE_OUT
AUDIO
LINE_OUT
AUDIO
LINE_OUT
AUDIO
LINE_OUT
AUDIO
LINE_OUT
E2PROM
FOR CONFIG.
BU2370FV
NJU7093A
XTAL
24.576MHZ
EXT.PLL
TLC2932
10K 10K 10K
ICELYNX_IEEE1394
TSB43CA43A
CONTROL_CPU
FOR_IEEE1394
RESET
CONTROL
DSD/LPCM
CONVERTER
SRAM
FLASH-ROM
SYSTEM_CONTROL
CPU
21MUX
TC74VCX157
DSP2
BASS_MANAGEMENT
AUDIO_DAC
C/LFE
AUDIO_DAC
FL/FR
AUDIO_DAC
DOWNMIX_LCH/RCH
AUDIO_DAC
SL/SR
DSP1
DECODER
ADC
96KHZ/24BIT
DIR
96KHZ/24BIT
FL/FR ADC_DATA_FL/FR
SDATA_FL/FR
SDATA_FL/FR FL
SL/SR ADC_DATA_SL/SR
SDATA_SL/SR
SDATA_SL/SR
C/SW ADC_DATA_C/SW
SDATA_C/SW
SDATA_C/SW
ADC_DATA_SBL/SBR
SDATA_SBL/SBR
SDATA_SBL/SBR FR
[ADC_DATA_MIC]
SBL/SBR ADC_BCLK/LRCK
BCLK/LRCK
BCLK
MIC LRCK
COMPRESSED_DATA
I2C I2C
SL
DIN1
1394DATA_FL/FR 1394DATA_SL/SR
1394DATA_C/SW
1394_BCLK/LRCK
MCLK SR
I2C
DIN2
DIN3
C
LFE
TPA0P HSDI1_60958_OUT
TPA0N
TPB0P MLPCM_A[ANCILLARY]
TPB0N MLPCM_D[2..0]
DVD_A_DATA[2..0]
MLPCM_BCLK[64FS]
DVD_A_BCLK
MLPCM_LRCLK
DVD_A_LRCK
TPA1P
DMXL
TPA1N
HSDI1_D[5..0]
SACD_FL/FR
TPB1P
HSDI1_CLK
SACD_SL/SR
TPB1N
HSDI1_D6[ANCILLARY]
SACD_C/SW
DMXR
HSDI1_SYNC
SACD_BCLK/LRCK
CDATA/CLATCH/CCLK
REF_SYT
FIN-A
DIV_VCO
FIN-B
VCO_CLK
VCO_OUT SELECT_S/A
XI
XI
XO
XO
RESET_ARMZ
+3.3V
JTAG_TCK
JTAG_TDI
MCIF_RW
JTAG_TDO
MCIF_STRBZ
JTAG_TMS
MCIF_WAIT
WAIT#
MCIF_CS_IOZ
CS0#
I2C I2C
MCIF_CS_MEMZ
CS2#
JTAG_TRST
MCIF_OEZ
RD#
ARM_JTAG_TDI
MCIF_WEZ
WE0#
ARM_JTAG_TDO
MCIF_BUSCLK
CKIO
ARM_JTAG_TMS
MCIF_INTZ
IRQ1/IRL1#
WTCH_DG_TMRZ
IRQ2/IRL2#
MCIF_ADDR[10..1]
A[10..0]
MCIF_DATA[15..0]
D[15..0]
UART_TXD
CTS CTS
UART_RXD
SDA RXD RXD
SCL RTS RTS
TXD TXD