EasyManua.ls Logo

Intel 80386

Intel 80386
308 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Figure
8-8
8-9
8-10
8-11
8-12
8-13
8-14
8-15
8-16
8-17
8-18
8-19
9-1
9-2
9-3
9-4
9-5
9-6
9-7
9-8
9-9
9-10
9-11
9-12
10-1
10-2
11-1
11-2
11-3
11-4
11-5
11-6
11-7
11-8
11-9
11-10
11-11
11-12
11-13
12-1
12-2
A-1
A-2
TABLE OF CONTENTS
Title
80286-Compatible
Interface
.................................................................. .
AO,
A1,
and
BHE#
Logic
......................................................................
..
SO#/S1
#
Generator
Logic
.................................................................... .
Wait-State
Generator
Logic
................................................................... .
82288
and
82289
Connections
............................................................
..
80386/82380
Interface
.......................................................................... .
HOLD
and
HLDA
Logic
for
80386-82258
Interface
..............................
..
82258
Slave
Mode
Interface
.................................................................. .
LAN
Station
........................................................................................... .
Decoupled
Dual-Port
Memory
Interface
................................................
..
Coupled
Dual-Port
Memory
Interface
.................................................... .
Shared
Bus
Interface
............................................................................. .
80386-MUL
TIBUS®
I
Interface
.............................................................. .
MUL
TIBUS®
I
Address
Latches
and
Data
Transceivers
........................ .
Wait-State
Generator
Logic
........................ , .........................................
..
MUL
TIBUS®
Arbiter
and
Bus
Controller
................................................ .
MUL
TIBUS®
I
Read
Cycle
Timing
........................................................
..
MUL
TIBUS®
I
Write
Cycle
Timing
........................................................
..
Bus
Priority
Resolution
.......................................................................... .
Operating
Mode
Configurations
............................................................. .
.
Bus-Select
Logic
for
Interrupt
Acknowledge
........................................
..
Byte-Swapping
Logic
............................................................................. .
Bus-Timeout
Protection
Circuit
.............................................................. .
iLBX'"
Signal
Generation
....................................................................... .
iPSB
Bus
Cycle
Timing
.......................................................................... .
iPSB
Bus
Interface
................................................................................ .
Reducing
Characteristic
Impedance
...................................................... .
Circuit
without
Decoupling
....................................................................
;.
Decoupling
Chip
Capacitors
.................................................................
..
Decoupling
Leaded
Capacitors
.............................................................. .
Series
Termination
................................................................................. .
Split
Termination
.......... : ..............................................................
~
.......... .
Avoid
Closed-Loop
Signal
Paths
..........................................................
..
CLK2
Series
Termination
......................................................................
..
CLK2
Loading
.......................................................................................
..
CLK2
Waveforms
.................................................................................. .
4-Byte
Diagnostic
Program
.................................................................... .
More
Complex
Diagnostic
Program
......................................................
..
Object
Code
for
Diagnostic
Program
.............................................. , .....
..
80386
Self-Test
..................................................................................... .
TLB
Test
Registers
............................................................................... .
PAL-1
State
Listings
.............................................................................. .
PAL-2
State
Listings
.............................................................................. .
xii
Page
8-19
8-21
8-22
8-22
8-23
8-24
8-25
8-26
8-28
8-29
8-30
8-31
9-3
9-4
9-6
9-7
9-8
9-9
9-12
9-13
9-16
9-18
9-19
9-20
10-3
10-4
11-2
11-2
11-3
11-4
11-5
11-5
11-6
11-8
11-9
11-9
11-12
11-15
11-16
12-2
12-3
A-3
A-9

Other manuals for Intel 80386

Related product manuals