Intel 80386

CHAPTER 10
MUL TIBUS® II AND 80386
Standard bus interfaces guarantee compatibility between existing and newly developed
systems. This compatibility safeguards a user's hardware investment against obsolescence
even in the face of rapidly advancing technology. The
MULTIBUS I standard interface has
proven its value
in providing flexibility for the expansion of existing systems and the integra-
tion of new designs. The
MUL TIBUS II standard interface extends Intel's Open Systems
design strategy into the world of 32-bit microprocessing systems.
10.1 MUL TIBUS® II STANDARD
The MUL TIBUS II standard is a processor-independent bus architecture that features a
32-bit parallel system bus with a maximum throughput of
40 megabytes per second, high-
speed local bus access to off-board memory, a low-cost serial system bus, and full multi-
processing support.
MUL TIBUS II achieves these features through five specialized Intel
buses:
• Parallel System Bus (iPSB)
•
Local Bus Extension (iLBX II)
• Serial System Bus (iSSB)
•
Multi-channel DMA I/O Bus
• System Expansion I/O Bus (iSBX)
The
DMA I/O Bus and the iSBX are carried over directly from MULTI BUS I architecture.
See the MULTIBUS® I Architectural Specification for a full description of these buses. The
multiple bus structure provides the following important advantages over a single, generalized
bus:
• Each bus is optimized for a specific function.
• The buses perform operations in parallel.
• Buses that are not needed for a particular system can be omitted, avoiding unnecessary
costs.
10.2 PARALLEL SYSTEM BUS (iPSB)
The Parallel System Bus (iPSB) is optimized for interprocessor data transfer and commu-
nication. Its burst transfer capability provides a maximum sustained bandwidth of
40
megabytes per second for high-performance data transfers.
10-1