Intel 80386

LOCAL BUS CONTROL PAL DESCRIPTIONS
state MEMORY:
NA := (INA & CLK) # (NA & ICLK);
if RESET then WAITING
else if LOWCOUNTING then MEMORY
else FLOAT;
state FLOAT:
NA := OFF;
"lWS
CMD active
"activate NA on second and third CLK2
"reset to WAITING
"remain while COUNTING down
" •.• then FLOAT
"data bus float delay
if RESET then WAITING
else if IIDLE & ICLK & CSOWS &
"reset to WAITING
CSIWS & CSIO then NOTLOCAL
else if COUNTING then FLOAT
else WAITING;
"watch for non-local bus cycle to start
" ••• else remain while COUNTING down
" ••• then WAIT
state NOTLOCAL: "OWS cycle or bus cycle not to the local bus
NA := OFF;
if RESET then WAITING
else if READY # ICLK then NOTLOCAL
else if COUNTING then FLOAT
else if lADS then SAMPLECS
else WAITING;
"reset to WAITING
"remain until bus cycle ends
" ••• then finish FLOAT if still COUNTING
" ••• else SAMPLECS if next bus piped
" ••• else WAIT
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state_diagram SEQUENCE
"counter for LOCALSTATE
state SEQ3:
if RESET then SEQO
else if !CLK then SEQ3
else SEQ2;
state SEQ2:
if RESET then SEQO
else if ICLK then SEQ2
else SEQ1;
state SEQ1:
if RESET then SEQO
else if ICLK then SEQl
else SEQO;
state SEQO:
"once count all
the way
case
RESET
!RESET & (LOCALSTATE == WAITING)
!RESET & (LOCALSTATE SAMPLECS)
IRESET
& (LOCALSTATE
SAMPLECS)
I RESET & (LOCALSTATE CMDDELAY)
!RESET & (LOCALSTATE CMDDELAY)
IRESET & (LOCALSTATE
IO)
I
RESET
& (LOCALSTATE IO)
!RESET
& (LOCALSTATE ENDIO)
!RESET & (LOCALSTATE MEMORY)
!RESET
& (LOCALSTATE
FLOAT)
!RESET & (LOCALSTATE == NOTLOCAL)
endcase;
"reset to SEQuence 0
"no change if CLK low
"count down every time CLK high
down,
figure out what to count next
SEQO
"reset to SEQuence 0
SEQO
"count not used
& !CSIWS SEQ2
"set up for lWS MEMORY
& CSIWS SEQO
"other than lWS MEMORY
& WR
SEQ3
"set up for IO write
& IWR SEQ2
"set up for IO read
& INA SEQO
"still in IO ••• remain
& NA SEQl
"set up for ENDIO
SEQ3
"set up for IO float
SEQl
"set up for lWS MEMORY
SEQl
"set up for IO recovery
SEQO
"count not used
Figure A-1. PAL-1 State Listings (Cont'd.)
A-5