Errata
Intel
®
Core™2 Extreme Quad-Core Processor QX6000
Δ
Sequence and 63
Intel
®
Core™2 Quad Processor Q6000
Δ
Sequence
Specification Update
in NMIs not being blocked after a VM-entry failure during or after loading
guest state.
Implication: VM-entry failures that cause NMIs to become unblocked may cause the
processor to deliver an NMI to software that is not prepared for it.
Workaround: VMM software should configure the virtual-machine control structure (VMCS)
so that VM-entry failures do not occur.
Status: For the steppings affected, see the Summary Tables of Changes.
AK121. Benign Exception after a Double Fault May Not Cause a Triple Fault
Shutdown
Problem: According to the Intel
®
64 and IA-32 Architectures Software Developer’s
Manual, Volume 3A, “Exception and Interrupt Reference”, if another
exception occurs while attempting to call the double-fault handler, the
processor enters shutdown mode. However due to this erratum, only
Contributory Exceptions and Page Faults will cause a triple fault shutdown,
whereas a benign exception may not.
Implication: If a benign exception occurs while attempting to call the double-fault
handler, the processor may hang or may handle the benign exception. Intel
has not observed this erratum with any commercially available software.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
AK122. IA32_MC1_STATUS MSR Bit[60] Does Not Reflect Machine Check
Error Reporting Enable Correctly
Problem: IA32_MC1_STATUS MSR (405H) bit[60] (EN- Error Enabled) is supposed to
indicate whether the enable bit in the IA32_MC1_CTL MSR (404H) was set at
the time of the last update to the IA32_MC1_STATUS MSR. Due to this
erratum, IA32_MC1_STATUS MSR bit[60] instead reports the current value of
the IA32_MC1_CTL MSR enable bit.
Implication: IA32_MC1_STATUS MSR bit [60] may not reflect the correct state of the
enable bit in the IA32_MC1_CTL MSR at the time of the last update.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
AK123. A VM Exit Due to a Fault While Delivering a Software Interrupt May
Save Incorrect Data into the VMCS
Problem: If a fault occurs during delivery of a software interrupt (INTn) in virtual-8086
mode when virtual mode extensions are in effect and that fault causes a VM
exit, incorrect data may be saved into the VMCS. Specifically, information
about the software interrupt may not be reported in the IDT-vectoring
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