10
Specification Update
AAU26
XX No Fix
Synchronous Reset of IA32_APERF/IA32_MPERF Counters on Overflow Does
Not Work
AAU27
XX No Fix
Disabling Thermal Monitor While Processor is Hot, Then Re-enabling, May
Result in Stuck Core Operating Ratio
AAU28
XX No Fix
Writing the Local Vector Table (LVT) when an Interrupt is Pending May Cause an
Unexpected Interrupt
AAU29
XX No Fix
xAPIC Timer May Decrement Too Quickly Following an Automatic Reload While
in Periodic Mode
AAU30
XX No Fix
Reported Memory Type May Not Be Used to Access the VMCS and Referenced
Data Structures
AAU31
XX No Fix
Changing the Memory Type for an In-Use Page Translation May Lead to
Memory-Ordering Violations
AAU32 X X No Fix
Erratum AAU32 added to this specification Update in error; all erratum details
removed from the specification update document.
AAU33
XFixed
Delivery of Certain Events Immediately Following a VM Exit May Push a
Corrupted RIP onto the Stack
AAU34
XX No Fix
Infinite Stream of Interrupts May Occur if an ExtINT Delivery Mode Interrupt is
Received while All Cores in C6
AAU35
XX No FixTwo xAPIC Timer Event Interrupts May Unexpectedly Occur
AAU36
XX No Fix
EOI Transaction May Not be Sent if Software Enters Core C6 During an Interrupt
Service Routine
AAU37
XX No Fix
FREEZE_WHILE_SMM Does Not Prevent Event From Pending PEBS During
SMM
AAU38
XX No FixAPIC Error “Received Illegal Vector” May be Lost
AAU39
XX No Fix
DR6 May Contain Incorrect Information When the First Instruction After a MOV
SS,r/m or POP SS is a Store
AAU40
XX No Fix
An Uncorrectable Error Logged in IA32_CR_MC2_STATUS May Also Result in a
System Hang
AAU41
XX No FixIA32_PERF_GLOBAL_CTRL MSR May Be Incorrectly Initialized
AAU42
XX No Fix
Performance Monitor Counter INST_RETIRED.STORES May Count Higher than
Expected
AAU43
XX No Fix
Sleeping Cores May Not be Woken Up on Logical Cluster Mode Broadcast IPI
Using Destination Field Instead of Shorthand
AAU44
XX No FixFaulting Executions of FXRSTOR May Update State Inconsistently
AAU45
XX No Fix
Performance Monitor Event EPT.EPDPE_MISS May be Counted While EPT is
Disable
AAU46
XX No FixMemory Aliasing of Code Pages May Cause Unpredictable System Behavior
AAU47
XX No FixPerformance Monitor Counters May Count Incorrectly
AAU48
XX No Fix
Performance Monitor Event Offcore_response_0 (B7H) Does Not Count NT
Stores to Local DRAM Correctly
AAU49
XX No Fix
EFLAGS Discrepancy on Page Faults and on EPT-Induced VM Exits after a
Translation Change
AAU50
XX No Fix
Back to Back Uncorrected Machine Check Errors May Overwrite
IA32_MC3_STATUS.MSCOD
Errata (Sheet 2 of 5)
Number
Steppings
Status ERRATA
C-2 K-0
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