11
Specification Update
AAU51
XX No Fix
Corrected Errors With a Yellow Error Indication May be Overwritten by Other
Corrected Errors
AAU52
XX No Fix
Performance Monitor Events DCACHE_CACHE_LD and DCACHE_CACHE_ST
May Overcount
AAU53
XX No FixRapid Core C3/C6 Transitions May Cause Unpredictable System Behavior
AAU54
XX No FixAPIC Timer CCR May Report 0 in Periodic Mode
AAU55
XX No Fix
Performance Monitor Events INSTR_RETIRED and MEM_INST_RETIRED May
Count Inaccurately
AAU56
XX No Fix
A Page Fault May Not be Generated When the PS bit is set to "1" in a PML4E or
PDPTE
AAU57
XX No Fix
BIST Results May be Additionally Reported After a GETSEC[WAKEUP] or INIT-
SIPI Sequence
AAU58
XX No FixPending x87 FPU Exceptions (#MF) May be Signaled Earlier Than Expected
AAU59
XX No FixVM Exits Due to "NMI-Window Exiting" May Be Delayed by One Instruction
AAU60
XX No Fix
The Memory Controller tTHROT_OPREF Timings May be Violated During Self
Refresh Entry
AAU61
XX No Fix
VM Exits Due to EPT Violations Do Not Record Information About Pre-IRET NMI
Blocking
AAU62
XX No Fix
Multiple Performance Monitor Interrupts are Possible on Overflow of
IA32_FIXED_CTR2
AAU63
XX No FixLBRs May Not be Initialized During Power-On Reset of the Processor
AAU64
XX No Fix
LBR, BTM or BTS Records May have Incorrect Branch From Information After an
EIST Transition, T-states, C1E, or Adaptive Thermal Throttling
AAU65
XX No FixVMX-Preemption Timer Does Not Count Down at the Rate Specified
AAU66
XX No Fix
Multiple Performance Monitor Interrupts are Possible on Overflow of Fixed
Counter 0
AAU67
XX No FixVM Exits Due to LIDT/LGDT/SIDT/SGDT Do Not Report Correct Operand Size
AAU68
XX No Fix
Performance Monitoring Events STORE_BLOCKS.NOT_STA and
STORE_BLOCKS.STA May Not Count Events Correctly
AAU69
XX No FixStorage of PEBS Record Delayed Following Execution of MOV SS or STI
AAU70
XX No Fix
Performance Monitoring Event FP_MMX_TRANS_TO_MMX May Not Count
Some Transitions
AAU71
XX No Fix
INVLPG Following INVEPT or INVVPID May Fail to Flush All Translations for a
Large Page
AAU72
XX No Fix
Logical Processor May Use Incorrect VPID after VM Entry That Returns From
SMM
AAU73
XX No Fix
The Memory Controller May Hang Due to Uncorrectable ECC Errors or Parity
Errors Occurring on Both Channels in Mirror Channel Mode
AAU74
XX No Fix
MSR_TURBO_RATIO_LIMIT MSR May Return Intel® Turbo Boost Technology
Core Ratio Multipliers for Non-Existent Core Configurations
AAU75
XFixedInternal Parity Error May Be Incorrectly Signaled during C6 Exit
AAU76
XX No FixPMIs during Core C6 Transitions May Cause the System to Hang
Errata (Sheet 3 of 5)
Number
Steppings
Status ERRATA
C-2 K-0
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