Errata
48 Specification Update
AZ63. INIT Incorrectly Resets IA32_LSTAR MSR
Problem: In response to an INIT reset initiated either via the INIT# pin or an IPI (Inter Processor
Interrupt), the processor should leave MSR values unchanged. Due to this erratum
IA32_LSTAR MSR (C0000082H), which is used by the iA32e SYSCALL instruction, is being
cleared by an INIT reset.
Implication: If software programs a value in IA32_LSTAR to be used by the SYSCALL instruction and
the processor subsequently receives an INIT reset, the SYSCALL instructions will not
behave as intended. Intel has not observed this erratum in any commercially available
software.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
AZ64. CPUID Instruction May Return Incorrect Brand String
Problem: When a CPUID instruction is executed with EAX = 8000_0002H, 8000_0003H, or
8000_0004H, the returned EAX, EBX, ECX, and/or EDX values may be incorrect.
Implication: When this erratum occurs, the processor may report an incorrect brand string.
Workaround: It is possible for the BIOS to contain a workaround for this erratum. Workaround does
NOT work for SLB5J and SLGAS processors.
Status: For the steppings affected, see the Summary Tables of Changes.
AZ65. Global Instruction TLB Entries May Not be Invalidated on a VM Exit or
VM Entry
Problem: If a VMM is using global page entries (CR4.PGE is enabled and any present page
directories or page-table entries are marked global), then on a VM entry, the instruction
TLB (Translation Lookaside Buffer) entries caching global page translations of the VMM
may not be invalidated. In addition, if a guest is using global page entries, then on a VM
exit, the instruction TLB entries caching global page translations of the guest may not be
invalidated.
Implication: Stale global instruction linear to physical page translations may be used by a VMM after a
VM exit or a guest after a VM entry.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Tables of Changes.
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