JVC KD-SH77R - General Setting (PSM) Details; Clock Display and Dimmer Settings; Level Meter and Contrast Adjustment; Telephone Muting and Key-Touch Tone

KD-SH77R/KD-SH55R
1-25
BR24C32F-X (IC703) : EEPROM
58
41
A0 1
A1 2
A2 3
GND 4
V Vcc
7 WP
6 SCL
5 SDA
DATA
REGISTER
8bit
ACK
STOP
START
12bit
12bit
32 kbit EEROM ARRAY
ADDRESS
DECODER
SLAVE/WARD
ADDRESS REGISTER
CONTROL LOGIC
HIGH VOLTAGE GEN. Vcc LEVEL DETECT
Pin No.
1
2
3
4
5
6
7
8
Symbol
A0
A1
A2
GND
SDA
SCL
WP
Vcc
I/O
I
I
I
-
I/O
I
I
-
Function
Slave address set
Slave address set
Slave address set
Ground
Slave & Word address, Serial data input/Serial address output
Serial clock input
Write protect input
Power supply
3. Pin function
2. Block diagram
1
2
3
4
8
7
6
8
B
A
1
2
3
4
5
6
7
8
A output
A -input
A +input
V-
B +input
B -input
B output
V+
Function
Pin
No.
1. Pin layout & Block diagram 2. Pin function
NJM4580V-X (IC671) : Ope amp