Keithley 237

SECTION3
IEEE-488
Reference
Programming
Notes
3-42
+
Bit 4 (Ready for Trigger)
-Set
when
the instrument
is
ready for a trigger. Cleared
when
unit
executes
bus
or
front panel changes,
or
in
calibration mode. Disabling trig-
gers
with
the
RO
command also clears the Ready for Trigger bit.
It
remains cleared
until triggers are enabled
and
the instrument
is
ready
for a trigger.
Bit 5
(Error)-
Set
when
one of the following errors has occurred:
•
A trigger overrun error has occurred.
•
An
illegal device-dependent command (IDOC)
or
an
illegal device-dependent
command option (IDOCO)
was
transmitted.
•
An
interlock condition exists.
•
An
illegal measure
or
source range
was
programmed.
•
An
invalid
mix
of sweep types
was
attempted.
•
An
attempted log sweep passes
through
zero.
•
A non-calibratiort command
was
programmed
while
in
cal mode,
or
a calibration
command
was
programmed
while
not
in
cal mode,
or
a Model 237/238
cal com-
mand
was
sent to a Model236.
• A self-test
or
power-up
test has failed.
•
A calibration error has occurred.
• Source
autoranging
in
pulse sweep
was
attempted.
This
bit
is
cleared
when
the
U1
status
word
is
read
to determine the type of error (see
paragraph
3.6.19).
Bit 6 (RQS, Request for
Service)-
Set
if
the
unit
has asserted
SRQ.
Cleared
when
the
instrument
is
serial polled.
Bit
7
(Compliance)-
Set
when
compliance
is
reached
during
the delay
or
measure
phases,
or
idle time
(M,OX),
or
when
compliance
is
reached
during
the measure
phase
only
(M,1X).
Cleared
on
serial poll
(if
SRQ
on
compliance asserted),
reprogramming of
source/
measure controller (i.e.,
with
an
A,
B,
C,
F,
J,
L,
N,
0,
P,
Q
S,
T,
V,
W command),
or
execution of
theM
command.
SRQMask
1.
The instrument
may
be
programmed
to
generate
an
SRQ
for more
than
one set of
conditions simultaneously. To
do
so, simply
add
up
the decimal
bit
values for the
required
SRQ
conditions. For example, to enable
SRQ
under
sweep done
(M2)
and
trigger
out
(M4),
send
M6,X.
2.
Send
MO,X
to disable
SRQ.
This command clears all bits
in
the
SRQ
mask.
Serial
Poll
Byte
1.
Even
with
SRQ
disabled, the serial poll byte can
be
read
to determine instrument
conditions. All set bits remain latched until
power
is cycled, a
OCL, SOC,
or
JOX
is
sent,
or
the specified clear bit condition
is
met.
2. The serial poll byte should
be
read
to clear the
SRQ
line once the instrument has
generated
an
SRQ. All bits
in
the serial poll byte are latched
when
the
SRQ is gen-
erated. Bit 6
(SRQ)
is
cleared
when
the serial poll byte is read.
3.
If
an
error
or
warning
occurs, bit 5 (error)
or
bit
0
(warning)
in
the serial poll byte
+