COMPONENT MAINTENANCE MANUAL
AVIATION RECORDERS
FA2100CVR
Rev. 15 Page 22
Apr. 14/16
Description and Operation
23–70–04
Use or disclosure of information on this sheet is subject
to the restrictions on the cover page of this document.
O. Ground Support Equipment Interface
The interface to the Ground Support Equipment (GSE) is via a bi-directional high-
speed serial link available at the front-panel GSE connector.
A facility for retrieving the stored data from the CSMU to Ground Support Equip-
ment, GSE, is provided for high-speed downloading of the voice data. The GSE In-
terface serves two purposes:
(1) As a connector for use with portable or bench test equipment for recorder
checkout.
(2) As a connector for use in downloading data into a storage device while on the
aircraft or bench.
P. BIT and Fault Detection
The FA2100 incorporates multiple overlapping methods of built−in−test (BIT) to en-
sure proper reporting of the recorder faults. At the most basic level the fault driver
outputs default to the FAULT state (even with no power applied to the recorder) and
must be actively cleared by a properly operating Store Manager Processor (SMP) as
the recorder powers up.
Next, a watchdog circuit monitors the operation of the SMP and associated circuitry.
This assures that a fault is asserted in the event of a processor failure (including par-
tial failures such as arithmetic errors, inordinate increments, and logic errors.) The
watchdog circuit will also be activated in the event of a failure of the SMP’s program
Flash memory.
If the SMP is operating properly it performs the task of monitoring the above listed
faults in the other FA2100 processors. It detects errors in the Flight Data Processor
(FDP) and Audio Compressor Processor (ACP) by checking for protocol errors and
unexpected data values.
The SMP checks the non−volatile random access memory (NVRAM) for operation
and data integrity using a cyclic redundancy check (CRC) on the contents. A failure
to read or write this device properly will be flagged by a CRC mismatch and a BIT
fault will be asserted.
Finally, the SMP verifies the function of the crash−survivable memory unit (CSMU)
by performing a read after each write to ensure the data written to CSMU can be re-
trieved.
The document reference is online, please check the correspondence between the online documentation and the printed version.
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