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ECP5 PCI Express Board User’s Guide
General Purpose LEDs (See Appendix B, "LEDs and Switches" sheet)
The LEDs provided on the ECP5 PCI Express Board are connected to general purpose FPGA I/Os. These LEDs
provide status for user designs and must be included in the design. The LEDs illuminate when the FPGA output is
driven LOW. Table 6 shows the LED and associated FPGA pins. These pins are within an I/O bank connected to
2.5 V and the user should program these to be LVCMOS25 type outputs in the design.
Table 4. LED Definitions
LPDDR3 Memory Device (See Appendix B, "LPDDR" sheet)
• The ECP5 PCI Express Board is equipped with a LPDDR3 memory device (1.2 V, 64 Mb/x32, 96-ball FBGA,
1600 MHz) such as the Micron EDF8132A1MC device.
• The LPDDR3 memory is limited to a 16-bit wide memory controller interface.
• A 100-MHz on-board clock oscillator is available to provide a LPDDR3 reference clock.
Table 5. DDR3 Memory Controller Interconnections
LED Number FPGA Ball Number PCB Designator LED Color
LED1 AM28 D1 Red
LED2 AL28 D2 Red
LED3 AM29 D3 Red
LED4 AK28 D4 Red
LED5 AK32 D5 Red
LED6 AM30 D6 Red
LED7 AJ32 D7 Red
LED8 AL30 D8 Red
NETNAME 484 fpBGA Ball Number NETNAME 484 fpBGA Ball Number
DQ0 AD3 CE0 U7
DQ1 Y1 CE1 U4
DQ2 AE3 CLKP R6
DQ3 AC5 CLKN T6
DQ4 AB4 CA0 R3
DQ5 W2 CA1 R1
DQ6 AE2 CA2 U2
DQ7 AD4 CA3 N1
DQ8 AC6 CA4 Y3
DQ9 AB7 CA5 P3
DQ10 Y6 CA6 P2
DQ11 Y5 CA7 T2
DQ12 AD7 CA8 U3
DQ13 W5 CA9 P1
DQ14 W4 ODT V6
DQ15 Y4 CS0# U6
DQS0 AC3 CS1# V7
DQS0# AB2 VREF V4
DQS1 AB5 DM0 AB3
DQS1# AB6 DM1 Y7
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