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LGE Internal Use OnlyCopyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
(P1801)
30P HD LVDS wafer
51P FHD LVDS wafer
(P1800)
COMP2_L/R_IN
COMP2_Y+/AV_CVBS_IN, COMP2_Pb+/Pr+
CK+/-, D0+/-, D1+/-, D2+/-_HDMI2
DDC_SCL/SDA_2, HDMI_CEC
Serial Flash
(8Mbit)
IC1300
SPI_SCK/SDI/SDO/CS
System EEPROM
(256Kbit)
IC104
I2C_SCL/SDA
RXA0+/-~RXA4+/-, RXACK+/ -
RXB0+/-~RXB4+/-, RXBCK+/ -
SPK_R
SPK_L
AMP_SCL/SDA
AUD_MASTER_CLK,
AUD_LRCH,
AUD_LRCK, AUD_SCK
TAS5733
(IC5600)
Connector
(P4600)
KEY1/2, LED_R, IR
REAR
HDMI1
(JK800)
SPDIF_OUT
SPDIF(Optic)
(JK1001)
SIDE
USB
(JK700)
HDMI2(MHL)
(JK801)
CK+/-, D0+/-, D1+/-, D2+/-,_HDMI4, DDC_SCL/SDA_4, HDMI_CEC
SIDE_USB_DM/DP
USB1_OCP/CTL
TPS65282
+5V_USB
MHL_CD_SENSE
AVDD5V_MHL,MHL_OCP
CI Slot(P1900)
NAND FLASH
IC102 (1Gbit)
H27U1G8F2CTR-BC
PCM_A[0:7]
TC74LCX244FT
Buffer
TS_DATA[0:7]
PCM_DATA[0:7]
COMPONENT
(JK2802)
5V_HDMI_4
PCM_A[8:14]
X-tal
24M
Main SOC
M1A -256MB Built-in
(IC101)
TU_SCL / SDA
SIF
FE_TS_DATA[8]
CVBS
BLOCK DIAGRAM