LG 49UB850T - H13 Block Diagram (Internal)

`14Y ULTRA HD Main Board Assy
※Main+Back
-
End Assy(Apply Back
-
End IC 1 chip
)
※
Main
+
Back
-
End
Assy(Apply
Back
-
End
IC
1
chip
)
DDR3
DDR
3
DDR3
DDR
3
DD
R
D
D
HDMI2.0
4K@60p to HDMI 2.0SW X 3EA
HDMI1.4 (4K@30p) or
1920X2160@60p + Audio
HDMI1. 4 (4K@30p) or
1920X2160@60p
+ Audio
e
3
3
R
3
D
R3
27M
HDMI1.4
1920X2160@60p
H13
1:2 Splitter
Same output
4K@30p to HDMI 2.0 SW X 1 EA(HDMI4)
e
MMC
HDMI 2.0
SW(P)
24M
2:1
24 75
24.75M
24M
HS-LVDS
4K@30p
OSD
1920X1080@60p
HDMI1. 4 (4K@30p) or
Mux
4K
Decoder
D14
4K@60p TS
From H13
1920X2160@60p
U14
URSA 9
4K@60p
24
.
75
M
HDMI1.
4
(4K@30p)
or
1920X2160@60p
+ Audio
HDMI1. 4 (4K@30p) or
1920X2160@60p
+ Audio
D14
1920X2160@60p
2:1
Mux
32bit(16bitX2)
1080
p
OSD
D
D
D
D
D
D
DDR
3
DDR
3
DDR
3
DD
R
DDR
3
DD
R
Vby1 16 Lane
4K@120Hz
D
R3
D
DR3
D
R3
D
DR3
3
3
3
R
3
3
R
3
Only for Super Resolution
Super Resolution Ready (for UB83/85/95)
MEMC 3D
MEMC
,
3D
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Only for training and service purposes
LGE Internal Use Only