LG 55LH95QD - Page 34

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
LVDS RX
HDMI_TX_VIDEO_B[3]
HDMI_TX_VIDEO_R[7]
HDMI_TX_VIDEO_R[4]
HDMI_TX_VIDEO_B[6]
HDMI_TX_VIDEO_G[1]
HDMI_TX_VIDEO_B[8]
HDMI_TX_VIDEO_G[9]
HDMI_TX_VIDEO_B[4]
HDMI_TX_VIDEO_R[6]
HDMI_TX_VIDEO_B[2]
HDMI_TX_VIDEO_B[5]
HDMI_TX_VIDEO_R[2]
HDMI_TX_VIDEO_G[5]
HDMI_TX_VIDEO_G[2]
HDMI_TX_VIDEO_R[9]
HDMI_TX_VIDEO_B[7]
HDMI_TX_VIDEO_G[7]
HDMI_TX_VIDEO_R[5]
HDMI_TX_VIDEO_B[9]
HDMI_TX_VIDEO_G[8]
HDMI_TX_VIDEO_G[3]
HDMI_TX_VIDEO_R[3]
HDMI_TX_VIDEO_G[4]
HDMI_TX_VIDEO_B[0]
HDMI_TX_VIDEO_G[0]
HDMI_TX_VIDEO_B[1]
HDMI_TX_VIDEO_R[1]
HDMI_TX_VIDEO_R[8]
HDMI_TX_VIDEO_R[0]
HDMI_TX_VIDEO_G[6]
R933 100
LVB_3P
009:D2
LVB_1M
009:D2
C923
0.1uF
16V
C909
1000pF
50V
TP901
C935
0.1uF
16V
TP900
HDMI_TX_VIDEO_CLK
017:E1
C917
1000pF
50V
LVA_1P
009:D1
LVA_CKM
009:D2
LVA_0M
009:D1
C904
1000pF
50V
C908
0.1uF
16V
C922
0.1uF
16V
R940 100
R953 0
R950 4.7K
TP903
C912
0.1uF
16V
HDMI_TX_VIDEO_R[0-9]
017:E3
R934 100
LVA_3M
009:D2
LVB_4M
009:D2
D3.3V_2
C927
1000pF
50V
R938 100
R942 100
R1042 27K OPT
HDMI_TX_VIDEO_DE
017:A2
LVA_2P
009:D1
R935 100
R949 4.7K
C916
1000pF
50V
LVA_2M
009:D2
C931
1000pF
50V
TP905
C932
1000pF
50V
C939
1000pF
50V
HDMI_TX_VIDEO_G[0-9]
017:E1
C929
1000pF
50V
LVB_CKM
009:D2
LVB_2M
009:D2
LVB_4P
009:D2
LVA_3P
009:D2
R956 0 OPT
R955 0 OPT
R954 0
C924
0.1uF
16V
HDMI_TX_VIDEO_B[0-9]
017:E1
D3.3V_2
R1043 0
R943 100
C936
0.1uF
16V
LVA_1M
009:D1
R937 100
C925
0.1uF
16V
TP904
R951 4.7K
C918
0.1uF
16V
C937
1000pF
50V
C921
0.1uF
16V
LVA_4M
009:D2
C910
0.1uF
16V
C934
0.1uF
16V
LVA_0P
009:D1
C901
0.1uF
16V
HDMI_TX_VIDEO_HSYNC
017:A2
TP906
C905
1000pF
50V
R948 4.7K
LVB_2P
009:D2
LVA_CKP
009:D2
LVB_3M
009:D2
R932 100
R939 100
HDMI_TX_VIDEO_VSYNC
017:A2
R1041 0 OPT
R944 4.7K OPT
C900
0.1uF
16V
LVB_CKP
009:D2
C913
0.1uF
16V
LVA_4P
009:D2
C906
1000pF
50V
C902
0.1uF
16V
R945 4.7K
C928
1000pF
50V
TP902
R946 4.7K
C920
0.1uF
16V
R941 100
R936 100
C907
1000pF
50V
C903
0.1uF
16V
C930
1000pF
50V
C911
1000pF
50V
C914
0.1uF
16V
C933
1000pF
50V
LVB_1P
009:D2
C915
1000pF
50V
C926
1000pF
50V
C938
1000pF
50V
R947 4.7K
LVB_0P
009:D2
R952 4.7K OPT
C919
0.1uF
16V
HDMI_TX_RESETb
017:A3;009:F5
LVB_0M
009:D2
IC900
DTC30LM36
EAN60390301
1
PLLGND_1
2
PLLVCC_1
3
MODE3
4
/PDN
5
MODE0
6
MODE1
7
DK
8
R_FB
9
OE
10
MODE2
11
MAP
12
VCC_1
13
GND_1
14
R20
15
R21
16
R22
17
R23
18
R24
19
R25
20
R26
21
VCC_2
22
GND_2
23
R27
24
R28
25
R29
26
G20
27
G21
28
VCC_3
29
VCC_4
30
GND_3
31
G22
32
G23
33
G24
34
G25
35
G26
36
G27
37
G28
38
VCC_5
39
GND_4
40
G29
41
B20
42
B21
43
B22
44
B23
45
B24
46
VCC_6
47
GND_5
48
B25
49
B26
50
B27
51
B28
52
B29
53
VCC_7
54
GND_6
55
CONT21
56
CONT22
57
VCC_8
58
GND_7
59
GND_8
60
CLKOUT
61
CLKVCC
62
CLKGND
63
R10
64
R11
65
R12
66
R13
67
R14
68
R15
69
R16
70
VCC_9
71
GND_9
72
R17
73
R18
74
R19
75
G10
76
G11
77
G12
78
G13
79
G14
80
VCC_10
81
GND_10
82
G15
83
G16
84
G17
85
G18
86
G19
87
B10
88
VCC_11
89
GND_11
90
B11
91
B12
92
B13
93
B14
94
B15
95
B16
96
B17
97
VCC_12
98
GND_12
99
B18
100
B19
101
HSYNC
102
VSYNC
103
DE
104
CONT11
105
CONT12
106
VCC_13
107
PLLVCC_2
108
PLLGND_2
109
LVDSGND_1
110
RA1-
111
RA1+
112
RB1-
113
RB1+
114
LVDSVCC_1
115
LVDSGND_2
116
RC1-
117
RC1+
118
RCLK1-
119
RCLK1+
120
LVDSVCC_2
121
LVDSGND_3
122
RD1-
123
RD1+
124
RE1-
125
RE1+
126
LVDSVCC_3
127
LVDSGND_4
128
RA2-
129
RA2+
130
RB2-
131
RB2+
132
LVDSVCC_4
133
LVDSGND_5
134
RC2-
135
RC2+
136
RCLK2-
137
RCLK2+
138
LVDSVCC_5
139
LVDSGND_6
140
RD2-
141
RD2+
142
RE2-
143
RE2+
144
SEL
C942
10uF
6.3V
L900 CIC21J601
L901 CIC21J601
L903 CIC21J601
L904 CIC21J601
OPT
L902 CIC21J601
C943
0.1uF
16V
C944
10uF
6.3V
C946
10uF
6.3V
C945
0.1uF
16V
R973 75
R972 75
R975 75
R964 75
R971 75
R968 75
R984 75
R966 75
R988 75
R986 75
R957 75
R985 75
R959 75
R990 75
R987 75
R977 75
R969 75
R960 75
R974 75
R962 75
R967 75
R958 75
R982 75
R989 75
R961 75
R978 75
R983 75
R980 75
R963 75
R979 75
R965 75
R970 75
R981 75
R976 75
C940
10pF
C941
10pF
HDMI_RES_SEL
009:F5
F
HED
A B
G
C
1
2
3
4
5
6
JUNO-BOX
16 17
MODE2 = L
-> DDR (Double Edge Output) Function Disble
MULTI WITH
THC63LVD1024
MODE[1:0] = LH
-> Dual-Link (Dual-IN/Single-OUT)
LVDS RECEIVER
DK = L
-> Output Clock Dealy = 0 (MODE = LH)
MAP = L or H
-> LVDS Mapping Table = Mode 1(H) or Mode2(L)
R/F = L
-> Output Clock Triggering Edge = Falling Edge)
Dual in / single out Single Edge Output
Output clock: 65Mhz/148mA 160Mhz/263mA
Dual input/ LVDS
Single output / TTL
MODE setting
pAY ATTEMTION ABOUT TTL LINE BOARD DESIGNE TO DEDUCE EMI
1. LINE MUST BE LOACATED IN 1’ST LAYER
2. USE GROUND VIA NEAR BY TTL LINE
Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only