LG 65UH8500 - Block Diagram

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LGE Internal Use Only
Copyright © LG Electronics. Inc. All rights reserved.
Only for training and service purposes
Block Diagram
1. M16 + F16 Circuit Block Diagram
Audio 2 AMP
(NTP7515)
M16
CI Slot
P_TS
P_TS
IF (+/-)
USB1 (3.0)
OPTIC
LAN
HDMI1 HDMI 2.0
EEPROM(NVRAM)
(256Kb)
HDMI
Air/
Cable
TUNER
(T2/C/A)
TUNER
(S2)
DVB-S
DEMOD
(S2)
LNB
USB2 (2.0)
51P/41P
eMMC
(4GB)
Sub Micom
(RENESAS
R5F100GEAFB)
DDR3 1866X16
(512MB X 2EA)
P_TS
X_TAL
24MHz
T2/C/S2 W/O AD
LM
GM
X_TAL
32.768KHz
I2S Out I2C 0
Vx1
USB
I2C 4
(HW Port)
COMP
OCP
R
E A
R
YPbPr
CVBS/L/R
SPDIF OUT
ETHERNET
I2C 2
(HW Port)
SUB
ASSY
IR / KEY/EYE
WIFI/BT Combo
USB_WIFI
CVBS
SMARTCARD_I/F
B-CAS
B-CAS
(JAPAN)
DDR3 2133 X 16
(512MB X 2EA)
HDMI3(External EDID)
USB3 (2.0)
F16
DDR3 2133 X 16
(128MB X 3EA)
RS232C/HP
HDMI2(ARC) HDMI 2.0
S_TS for JP
AV
RTL8
201F
Vx1
OCP
OCP
LOCAL DIMMING
VS/SCLK/MOSI
AMP
TI
UART RX/TX
X_TAL
25MHz
I2C