LG FE-286E - Page 41

- 2-44 -
Control circuit
12-bit shift register
Latch
Output buffer
(open drain)
1Vss
2DATA
3CLOCK
4Q0
5Q1
6 Q2
7Q3
8Q4
16 VDD
15 Q11
14 Q10
13 Q9
12 Q8
11 Q7
10 Q6
9 Q5
Pin No.
Pin name Function
BU2090/F/FS BU2092/F BU2092/FV
111Vss GND
222DATA Serial data input
333CLOCK Data shift clock input
-44LCK Data latch clock input
455Q0parallel data output
566Q1parallel data output
677Q2parallel data output
788Q3parallel data output
899Q4parallel data output
91010Q5parallel data output
10 11 11 Q6 parallel data output
--12 N.C. Not connected
--13 N.C. Not connected
11 12 14 Q7 parallel data output
12 13 15 Q8 parallel data output
13 14 16 Q9 parallel data output
14 15 17 Q10 parallel data output
15 16 18 Q11 parallel data output
-1719OEOutput Enable
16 18 20 V
DD Power supply
PIN DESCRIPTION
■ BU2090F
12-bit, Serial IN, Parallel OUT driver
Block diagram