LG GD510 - 3 Technical Brief; GD510 Functional Block Diagram

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3. Technical brief
3. Technical brief
GD510 Operational Description Revision A
LG Electronics 17/113 LGE Property
III. Technical brief
III-1 Baseband circuit
3.1. GD510 Functional Block diagram.
The functional component arrangement is mentioned below diagram.
Figure 1 GD510 Functional block diagram
3-1. Baseband circuit
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GD510 BLOCK DIAGRAM(0723)
PMB6821(PM IC)
BB IC(PMB8877)
(2G NAND +
1G DDR SDRAM)
Charging IC
Ր-SD + SIM Socket
TRANSCEIVER
PMB6272
DGM1110M014
BT IC
BC7820
Vibrator
LCD, 3.0”
262K TFT WQVGA
KEY PAD
KEY Back Light
Charge Pump
(AAT3169)
LED Matrix Module
SD1 (1.35V)
SD2(1.8V)
SD2(1.8V)
VAUX (2.9V)
VIO(2.62V)
VSIM(2.9V)
VMME (2.9V)
VUMTS(2.85V)
VUSB(3.1V) VLED (2.9V)
VAUDIOa(2.5V)
VAUDIOb(2.5V)
VRF1(2.85V)
VRF2(1.53V)
VRF3(2.70V)
VPLL(1.35V)
VRTC(2.0V)
VVIB(2.8V)
VBAT
DCS/PCS
GSM850/900
FEM PAM(TQ7M5005H)
3M CAM
FE1 FE2
PA_MODE
PA_BAND
TXON_PA
PA_LEVEL
AFC
I/I_/Q/Q_
RF_EN
RF_CLK
RF_DA
26M_MCLK
26M_TCXO
ANT
BPF
BT ANT
FM ANT
UART
/
/
I2S
/
BT_CLK
ADD(0:29)
/
DATA(0:15)
/
32kHz
HEADSET MIC
HEADSET RECEIVER
MAIN MIC
FM RADIO
FM RADIO
AUIDO AMP(MAX9877)
EPN11
EPP11
EPPA11
EPPA21
RXIN-
RXIN+
INA1
INA2
MAIN SPEAKEROUT-
OUT+
MIC1(P/N)
MIC2(P/N)
VMICP/N
I2C
/
INB1/2
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Match
Match
Match
Match
Controller
Battery
CHG_EN
T_IN1
I2C
/
(LED CTRL : 5 ea)
I2C
/
I2C
/
I2C
/
VBAT
END_KEY
COL
ROW
KEY_COL
KEY_ROW
2V11_RTC
2V11_RTC
B/UP BAT.
CAM_ I2C
/
I2C1
I2C1
I2C1
I2C1
CIF
MMC I/F
/
MMC I/F
VIB_EN
GPIO
PA_MODE
PA_BAND
TXON_PA
PA_LEVEL
UART
I2S
ymGpu{lymhjl
Memory
FM_ANT
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USW_P/USW_M
VBUS_USB
DIF
/
DIF
Touch Window
3-Axis Accelerometer
CAM_I2C
CAM_I2C
I 2C
/
I 2C
KEY_EN
GPIO
MUIC
USW_ID
I2C
UART
HEADSET RECEIVER
HEADSET MIC
Solarcell Battery Cover (option)