LG GD510 - Memory

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LGE Internal Use Only Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. Technical brief
GD510 Operational Description Revision A
LG Electronics 34/113 LGE Property
3.6. Memory
2Gbit NAND & 1Gbit DDRSDRAM employed on GD510 with 8 & 16 bit parallel data bus thru ADD(0)
~ ADD(29). The 2Gbit Nand Flash memory with DDRAM stacked device family offers multiple
high-performance solutions.
Figure 9 Flash memory & DDR RAM MCP circuit diagram
K522H1HACB-B060
U201
21T 11T 01T
3T
2T 1
T
21R
11
R
01
R
3R 2R
1
R
2
1P
11P 3P
2P 1P 2N 2M
2L
01K
9K 8K 5K 4K
2K
11J 01J
9J
8J 7J 6J 5J 4J 3J
P8D5
P4D6
E6
P6F6
C8F5
C4E5
D7
P5C7
C6
P9L7
P7L6
H10K7
G2K6
C9N9
C5M9
L9
H2N8
M8
N3L8
E3N7
K3M7
L3N6
F3M6
M3N5
G3M5
L5
D11N4
E11M4
F11L4
G11E9
K11E7
L11F7
M11G5
N11G7
C10D9
D10D8
E10E8
F10F8
L10G8
M10G4
N10F4
P10E4
D4
2J
9H 8H
7
H
6H 5H
4H
3
H
01G
9G 6G
9
F
2F
11H
2E
3
D
2D
1D
2
1C
11C
3C 2
C
1C
21B 11B 01B
3B
2B 1B
21A 11A
01A
3A 2A 1A
1
C
N
2CN 3CN 4CN 5CN 6CN 7CN
8CN 9CN
0
1
C
N
11
C
N
21CN 31CN 4
1
C
N
51
C
N
61CN 71CN
8
1
C
N
91
C
N
02CN 12CN 2
2
C
N
32
C
N
42CN 52CN 6
2
C
N
72
C
N
82CN 92CN 03CN 1
3
C
N
23
C
N
33CN 43CN
5
3
C
N
A0
A1 I_O0
A2 I_O1
A3 I_O2
A4 I_O3
A5 I_O4
A6 I_O5
A7 I_O6
A8 I_O7
A9 I_O8
A10 I_O9
A11 I_O10
A12 I_O11
A13 I_O12
DQ0 I_O13
DQ1 I_O14
DQ2 I_O15
DQ3
DQ4 _CE
DQ5 _WEN
DQ6 _RE
DQ7 ALE
DQ8 CLE
DQ9 R__B
DQ10 _WP
DQ11
DQ12 VCCN1
DQ13
DQ14 VSS1
DQ15 VSS2
LDQM VSS3
UDQM VSS4
LDQS VSS5
UDQS VSS6
_CLK
CLK VSSQ
CKE
BA0 VDD1
BA1 VDD2
_RAS VDD3
_CAS
_WED VDDQ1
_CS VDDQ2
6
3
C
N
73CN 83CN 93CN 0
4
C
N
14CN 2
4
C
N
34CN 44CN 54
C
N
6
4
C
N
74CN 84CN
9
4
C
N
0
5
C
N
15CN 25CN 3
5
C
N
4
5
C
N
55CN 65CN 7
5
C
N
8
5
C
N
95CN 06CN 1
6
C
N
2
6
C
N
36CN
46CN 56CN 66
C
N
76
C
N
86CN 96CN 07
C
N
n01102C
2
02
C n0
0
1
302C n001
n001402C
7
0
2C n
0
1
TP201
TP
TP
TP202
TP203
TP
TP
TP204
TP205
TP
SD_1V8
SD_1V8
612C n
0
01
n001712C
402R K01
SD_1V8
n001812C
TP
TP206
K3.3502R
912C n01
n01022C
122C n01
n01222C
_WP
BA1
BA0
DATA[10]
DATA[15]
DATA[14]
DATA[13]
DATA[12]
DATA[11]
DATA[9]
DATA[8]
DATA[2]
DATA[7]
DATA[6]
DATA[5]
DATA[4]
DATA[3]
DATA[1]
DATA[0]
UDQS
LDQS
ADD[29]
ADD[28]
ADD[27]
ADD[26]
SDCLKI
_WR
_WR
SDCLKO
_RD
_RAM_CS
CKE
_CAS
FCDP
_BC1
_BC0
_NAND_CS
ADD[25]
ADD[4]
ADD[3]
ADD[24]
ADD[23]
ADD[22]
ADD[21]
ADD[20]
ADD[2]
ADD[19]
ADD[18]
ADD[17]
ADD[17]
ADD[16]
ADD[16]
ADD[15]
ADD[9]
ADD[14]
ADD[8]
ADD[13]
ADD[7]
ADD[12]
ADD[6]
ADD[11]
ADD[5]
ADD[10]
ADD[1]
ADD[0]
_RAS
DATA[0:15]
A
DD[0:15]
ADD[16:29]
Large Block Memory
(2048Mbit NAND / 1024 Mbit DDR SDRAM, 1.8V I/O)