1n
C4105
TOL=0.01
51
R4109
33pC4100
CBL_PWR_N
KPD_PWR_N
OPT_2
OPT_1
PS_HOLD
PON_RESET_N
SPMI_CLK
SPMI_DATA
XO_THERM
GND_XOADC
XTAL_19M_IN
XTAL_19M_OUT
GND_XO
BB_CLK1_EN
RF_CLK1
RF_CLK2
BB_CLK1
BB_CLK2
REF_BYP
GND_REF
AMUX_1
AMUX_2
AVDD_BYP
PON_1
RESIN_N
SHDN_N
AMUX_PU1
AMUX_HW_ID
AMUX_0
AMUX_3
AMUX_4
AMUX_5
MPP_07
VREF_DDR
VDD_MSM_IO
VCTRL
DVDD_BYP
VREF_EBI0_CA
VREF_EBI1_CA
VREF_EBI0_DQ
VREF_EBI1_DQ
VREF_XO_THERM
SLEEP_CLK
LN_BB_CLK
GND_CLKS_XO
GND_RF
VREG_XO
VREG_RF_CLK
GPIO_01
GPIO_02
GPIO_03
GPIO_22
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
VPH_PWR
VPH_PWR_2
VDD_SNS
VCOIN
LPG_DRV1/GPIO_04
LPG_DRV2/GPIO_05
BAT_ALARM_IN/GPIO_06
LPG_DRV3/GPIO_07
LPG_DRV4/GPIO_08
LPG_DRV5/GPIO_09
LPG_DRV6/BB_CLK2_EN/GPIO_10
RF_CLK1_EN/GPIO_11
RF_CLK2_EN/GPIO_12
LN_BBCLK_EN/GPIO_13
CHGR_INT/GPIO_14
DIV_CLK1/SLEEP_CLK2/GPIO_15
DIV_CLK2/SLEEP_CLK3/GPIO_16
DIV_CLK3/SLEEP_CLK4/GPIO_17
DIV_CLK4/SLEEP_CLK5/GPIO_18
EXT_REG_EN1/GPIO_19
EXT_REG_EN2/GPIO_20
BAT_ALARM_OUT/BAT_ALARM_IN/GPIO_21
VREF_PADS/MPP_01
US_EURO_HS_SEL/MPP_02
VREF_DAC/MPP_03
HDMI_EN/MPP_04
SPKR_BOOST_EN/MPP_05
ENET_RST_N/MPP_06
PRIVACY_LED/MPP_08
PM8996
U4100
145
192
161
55
39
85
116
141
142
157
172
187
143
158
188
189
144
159
174
190
40
86
102
104
26
154
63
185
118
225
146
129
128
127
114
113
112
99
98
97
84
82
126
41
42
88
8
23
83
51
69
72
66
139
184
168
153
132
163
155
169
160
49
94
111
50
79
110
148
131
177
117
80
65
140
156
70
54
53
68
22
38
6
7
81
96
100
101
162
115
125
170
130
191
C4108 0.1u
TP4102
+VPWR
VREF_DAC_MPP_3
+1V8_VREG_S4A
+1V8_VREG_L8A
C4110 0.1u
TP4101
VREF_SDC_UIM_APC
16 15 14 13 12 11 10 9
8
7 6 5 4 3 2 1
L
K
J
I
H
G
F
E
D
C
B
A
L
K
J
I
H
G
F
E
D
C
B
A
16 15 14 13 12 11 10 9
8
7 6 5 4 3 2 1
DRAWN BY
SIZE
DWG NO
REV
TITLE
SHEET
of
A2
LG Electronics
Date
LGE Internal Use Only
User Name
4-1-2_PMIC_PM8941
Drawing Date
26
Schematic1
Rev
PDM NUMBER
WTR0_XO_IN
PMIC_SPMI_DATA
PMIC_SPMI_CLK
BBCLK1_CXO
LNBBCLK_CXO2
SENSOR_PWR_EN
STAT_SMB1350
PM_PON_RESET_N|MSM_RESIN_N
PM_PON_RESET_N
PA_THERM_0
5V_VCONN_BOOST_EN
SLEEP_CLK
BBCLK1_EN
PM_USB_ID
SBU_SEL
BAT_LOW_ALARM
PHONE_ON_N
VOL_DOWN_PM
CODEC_MCLK
VOL_UP_PM
PMI_CLK_IN
PMI8994_SYSOK
PMI_SPON
WTR1_XO_IN
Bd_THERM_2
AOD_RTC
JTAG_PS_HOLD|MSM_PS_HOLD
MSM_PS_HOLD
VCOIN
VCOIN
PCB_REVISION
PCB_REVISION
WIFI_SLEEP_CLK
WLAN_POWER_ON
GND
VDD
Hi-Z TBD
OPT_2 Power-on sequence
PMIC will power-down
TBD
CONNECT GND FROM PIN TO CAPACITOR,
THEN TO SYSTEM GND
Place caps close to PMIC
VREG_RF_CLK is PM8994 VREG_L5
VREG_XO is PM8994 VREG_L7
THEN TO SYSTEM GND
CONNECT GND FROM PIN TO CAPACITOR,
QCT ref schematic revB
Odd number MPPs can be configured for output voltage buffers
Even number MPPs can be configured for current sinks, up to 40 mA in 5 mA
< 4-1-11-1_PMIC_PM8996_Data > Rev_0.3
BACKUP BATTERY
C4111
DNI
TP4104
R4106
DNI
HIFI_LDO_SW
LCD_AOD_BL_EN
LDAF_EN
HIFI_MODE2
0_1
D
0.300
0.383
0.608
0.505
100K
100K
100K
E
100K
130K
180K
240K
0
0_2
0.900
0.771
1.157
1.017
B
100K
100K
100K
100K
100K
20K
27K
39K
51K
75K
C
PCB_Revision
100K 1.271
100K
1.1
1.0 DNI
360K
1.800
100K 1.408
SW_REV
HW_REV
KOR N_A E/G
HDK1
QDM1
REV_0
REV_AREV_AREV_A
HDK2
A
16.06.28
16M_AVDD_EN
8M_AVDD_EN
BT_POWER_ON
REV_0 REV_0
F
REV_B
REV_10
C4106
1u
1uC4109
VI
VI
R4110
100K
0.01
VI
C4107
1u
VI
16.05.30 Global
C4103
47u
C4104
47u
REV_B
REV_1.0(Global)
X4100
21
34
SENSOR XTAL2
XTAL1 GND1
EAW62883701
1RAE19200BAA
19.2M
R4102
DNI
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