LiteOn WCBN814A - Page 16

WCBN814A User Manual
Page 16/21
39
GND
G
Ground
YES
40
RESERVED - NC
41
PETp0 I/O
PCIe TX differential signal shall be connected to
receiver differential pair on the system board
YES
42
RESERVED - NC
43
PETn0 I/O
PCIe TX differential signal shall be connected to
receiver differential pair on the system board
YES
44
COEX0
(LTE_ACTIVE)
I/O Coexistence between WiFi+BT and WWAN NC
45
GND G Ground YES
46
COEX1
(LTE_PRI)
I/O Coexistence between WiFi+BT and WWAN NC
47
REFCLK+
I
PCIe reference clock signals(100MHz)
YES
48
COEX2
(LTE_SYNC)
I/O Coexistence between WiFi+BT and WWAN NC
49
REFCLK-
I
PCIe reference clock signals(100MHz)
YES
50
SUSCLK(32kHz) I
Suspend Clock is a 32.768KHz clock supply input
that is provided by platform to enable WLAN to
enter reduce power consumption mode. Optional
NC
51
GND G Ground YES
52
PERST# I
PCIe Reset is a functional reset to WLAN; Active
Low
YES
53
CLKREQ# I/O
Clock request is a reference clock request signal.
An external pull-up resistor on the platform is
required; Active Low
YES
54
BT_EN#
I
Active Low to disable BT radio operation
YES
55
PEWAKE# O
Request to service a function initiated wake event.
An external pull-up resistor on the platform is
required; Active Low
YES
56
WL_EN# I Active Low to disable WLAN radio operation YES
57
GND
G
Ground
YES
58
I2C DATA I/O I2C Data; Open Drain with pull up on platform NC
59
RESERVED
NC
60
I2C CLK I I2C clock input from host NC
61
RESERVED
NC
62
ALERT# O IRQ line to host processor; Active low NC
63
GND
G
Ground
YES
64-68
RESERVED NC
69
GND
G
Ground
YES
70-71
RESERVED NC
72
3.3V
I
3.3V source
YES
73
RESERVED NC
74
3.3V
I
3.3V source
YES
75
GND G Ground YES