4 SAFETY FB SPECIFICATIONS
4.8 M+SF_GMON_R
51
4
Typical timing diagram
■ For M+SF_GMON_R
A program operation is suspended while the operation status of the CPU module is in STOP or PAUSE. Consequently,
measurement of the i_dDiscrepancyTime elapsed time is stopped.
■ For M+SF_GMON_R
A program operation is suspended while the operation status of the CPU module is in STOP or PAUSE. Consequently,
measurement of the i_dDiscrepancyTime elapsed time is stopped.
Error behavior
In the event of an error, the output signals behave as listed below.
For the corrective actions, see the following.
Page 52 List of error codes
Output signal Status
o_bReady ON
o_bS_GuardMon OFF
o_bError ON
i_bActivate
i_bS_GuardSwitch1
i_bS_GuardSwitch2
i_bS_StartReset
i_bS_AutoReset
i_bReset
i_dDiscrepancyTime
o_bReady
o_bS_GuardMon
o_bError
o_wDiagCode
0000H 8003H 8003H 8000H 8002H 8012H 8014H 8003H 8000H 8002H 8012H 8012H 8003H C001H 8012H
8012H 8004H 8004H C011H C011H 8012H 8014H 8003H 8002H 8002H 8012H 8003H 8000H 0000H
i_bActivate
i_bS_GuardSwitch1
i_bS_GuardSwitch2
i_bS_StartReset
i_bS_AutoReset
i_bReset
i_dDiscrepancyTime
o_bReady
o_bS_GuardMon
o_bError
o_wDiagCode
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