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The 68000's Instruction Set
Application: Suppose we wish to input a block of 512 bytes of data (the data is
returned in register D1). If the input routine returns a value zero
in D1, an error has occurred and the loop must be exited.
LEA Dest,A0 Set up pointer to destination
MOVE.W #511,D0 512 bytes to be input
AGAIN BSR INPUT Get the data in D1
MOVE.B D1,(A0)+ Store it
DBEQ D0,AGAIN REPEAT until D1 = 0 OR 512 times
Condition codes: X N Z V C
- - - - -
Not affected
DIVS, DIVU Signed divide, unsigned divide
Operation: [destination] ← [destination]/[source]
Syntax: DIVS <ea>,Dn
DIVU <ea>,Dn
Attributes: Size = longword/word = longword result
Description: Divide the destination operand by the source operand and store
the result in the destination. The destination is a longword and
the source is a 16-bit value. The result (i.e., destination register) is
a 32-bit value arranged so that the quotient is the lower-order
word and the remainder is the upper-order word. DIVU performs
division on unsigned values, and DIVS performs division on twos
complement values. An attempt to divide by zero causes an
exception. For DIVS, the sign of the remainder is always the same
as the sign of the dividend (unless the remainder is zero).
Attempting to divide a number by zero results in a divide-by-zero
exception. If overflow is detected during division, the operands
are unaffected. Overflow is checked for at the start of the opera-
tion and occurs if the quotient is larger than a 16-bit signed inte-
ger. If the upper word of the dividend is greater than or equal to
the divisor, the V-bit is set and the instruction terminated.
Application: Consider the division of D0 by D1, DIVUD1,D0, which results in:
[D0(0:15)] ← [D0(0:31)]/[D1(0:15)]
[D0(16:31)]
← remainder
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