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Motorola 68000 User Manual

Motorola 68000
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2
The 68000's Instruction Set
Two notations are employed for address register indirect addressing. The
notation originally used to indicate address register indirect addressing has been
superseded. However, the Teesside 68000 simulator supports only the older form.
Old notation Current notation
d(An), d(An,Xi) (d,An), (d,An,Xi)
d(PC), d(PC,Xi) (d,PC), (d,PC,Xi)
ABCD Add decimal with extend
Operation: [destination]
10
[source]
10
+ [destination]
10
+ [X]
Syntax: ABCD Dy,Dx
ABCD -(Ay),-(Ax)
Attributes: Size = byte
Description: Add the source operand to the destination operand along with
the extend bit, and store the result in the destination location.
The addition is performed using BCD arithmetic. The only legal
addressing modes are data register direct and memory to memory
with address register indirect using pre-decrementing.
Application: The ABCD instruction is used in chain arithmetic to add together
strings of BCD digits. Consider the addition of two nine-digit
numbers. Note that the strings are stored so that the least-
significant digit is at the high address.
LEA Number1,A0 A0 points at first string
LEA Number2,A1 A1 points at second string
MOVE #8,D0 Nine digits to add
MOVE #$04,CCR Clear X-bit and Z-bit of the CCR
LOOP ABCD -(A0),-(A1) Add a pair of digits
DBRA D0,LOOP Repeat until 9 digits added
Condition codes: X N Z V C
* U * U *
The Z-bit is cleared if the result is non-zero, and left unchanged
otherwise. The Z-bit is normally set by the programmer before
the BCD operation, and can be used to test for zero after a chain
of multiple-precision operations. The C-bit is set if a decimal
carry is generated.

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Motorola 68000 Specifications

General IconGeneral
ArchitectureCISC
Data Width16-bit
Address Width24-bit
Transistor Count68, 000
Instruction SetMotorola 68000
Maximum Addressable Memory16 MB
ManufacturerMotorola
Model68000
TypeMicroprocessor
Voltage5 V
Process Technology3.5 μm
Package64-pin DIP, 68-pin PGA, 68-pin PLCC

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