Motorola 68000 - Page 57

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The 68000's Instruction Set
The only legal addressing modes are data register direct and
memory to memory with address register indirect using auto-
decrementing.
Condition codes: X N Z V C
* * * * *
Z: Cleared if the result is non-zero, unchanged otherwise. The Z-
bit can be used to test for zero after a chain of multiple precision
operations.
SWAP Swap register halves
Operation: [Register(16:31)] ← [Register(0:15)];
[Register(0:15)]
← [Register(16:31]
Syntax: SWAP Dn
Attributes: Size = word
Description: Exchange the upper and lower 16-bit words of a data register.
Application: The SWAP Dn instruction enables the higher-order word in a register
to take part in word operations by moving it into the lower-order
position. SWAP Dn is effectively equivalent to ROR.L Di,Dn, where
[Di] = 16. However, SWAP clears the C-bit of the CCR, whereas
ROR sets it according to the last bit to be shifted into the carry bit.
Condition codes: X N Z V C
- * * 0 0
The N-bit is set if most-significant bit of the 32-bit result is set
and cleared otherwise. The Z-bit is set if 32-bit result is zero and
cleared otherwise.
TAS Test and set an operand
Operation: [CCR] ← tested([operand]); [destination(7)] ← 1
Syntax: TAS <ea>
Attributes: Size = byte
Description: Test and set the byte operand addressed by the effective address
field. The N- and Z-bits of the CCR are updated accordingly. The