3-23
BIOS Setup
MS-7668
Chapter 3
Auto OverClock Technology
This item is used to enable/ disable Auto OverClock Technology.
Memory-Z
Press <Enter> to enter the sub-menu and the following screen appears.
DIMM1~4 Memory SPD Information
Press <Enter> to enter the sub-menu. The sub-menu displays the informations of
installed memory.
Current DRAM Channel1~4 Timing
It shows the installed DRAM Timing. Read-only.
DRAM Timing Mode
Select whether DRAM timing is controlled by the SPD (Serial Presence Detect) EE-
PROM on the DRAM module. Setting to [Auto] enables DRAM timings and the following
“Advance DRAM Conguration” sub-menu to be determined by BIOS based on the con-
gurations on the SPD. Selecting [Manual] allows users to congure the DRAM timings
and the following related “Advance DRAM Conguration” sub-menu manually.
Advance DRAM Conguration
Press <Enter> to enter the sub-menu.
CH1/ CH2 1T/2T Memory Timing
This item controls the SDRAM command rate. Select [1N] makes SDRAM signal
controller to run at 1N (N=clock cycles) rate. Selecting [2N] makes SDRAM signal
controller run at 2N rate.
CH1/ CH2 CAS Latency (CL)
This controls the CAS latency, which determines the timing delay (in clock cycles)
before SDRAM starts a read command after receiving it.
CH1/ CH2 tRCD
When DRAM is refreshed, both rows and columns are addressed separately. This
setup item allows you to determine the timing of the transition from RAS (row ad-
dress strobe) to CAS (column address strobe). The less the clock cycles, the faster
the DRAM performance.
CH1/ CH2 tRP
This setting controls the number of cycles for Row Address Strobe (RAS) to be
allowed to precharge. If insucient time is allowed for the RAS to accumulate its
charge before DRAM refresh, refresh may be incomplete and DRAM may fail to
retain data. This item applies only when synchronous DRAM is installed in the sys-
tem.
CH1/ CH2 tRAS
This setting determines the time RAS takes to read from and write to memory cell.
CH1/ CH2 tRFC
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