MSI X79A-GD65 (8D) Series - Page 40

En-39
Englsh
tRAS
Determnes the tme RAS (row address strobe) takes to read from and wrte to
memory cell.
tRFC
Ths settng determnes the tme RFC takes to read from and wrte to a memory
cell.
tWR
Determnes mnmum tme nterval between end of wrte data burst and the start of a
pre-charge command. Allows sense ampl󰘰ers to restore data to cell.
tWTR
Determnes mnmum tme nterval between the end of wrte data burst and the start
of a column-read command; allows I/O gatng to overdrve sense ampl󰘰es before
read command starts.
tRRD
Spec󰘰es the actve-to-actve delay of d󰘯erent banks.
tRTP
Tme nterval between a read and a precharge command.
tFAW
Ths tem s used to set the tFAW (four actvate wndow delay) tmng.
tWCL
Ths tem s used to set the tWCL (Wrte CAS Latency) tmng.
tCKE
Ths tem s used to set the Pulse Wdth for DRAM module.
tRTL
Ths tem s used to set Round Trp Latency settngs.
tXP
Ext Power Down wth DLL on to any vald command; Ext Precharge Power Down
wth DLL frzon to commands not requrng a locked DLL.
==Advanced Tmng Con󰘰guraton==
Follwng tems are used to set the read/ wrte tmngs for memory.
tRRDR
Read-Read D󰘯erent Rank, same DIMM.
tRRDD
Read-Read D󰘯erent Rank.
tWWDR
Wrte-Wrte D󰘯erent Rank, same DIMM.
tWWDD
Wrte-Wrte D󰘯erent Rank.
tRWDRDD
Read-Wrte D󰘯erent Ranks same or D󰘯erent DIMM.
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