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NOVAT
ECH INSTRUMENTS
7
408A Manual
POWER
LOGIC
48-Bit
DDS,
LP Filter x2 AMP x2
I/Q
OUT
Buffer
TTL
OUT
POWER
FILTERS &
+5V
-5V
Master
Clock
EXT
CLK
IN
CLK SEL
Figure 3.
Simplified System Block Diagram
Model 408A
RS232
µ
C
System Control
+3.3V
REGULATOR
Vo lt ag e
Control
AD9854
Table 7:
DDS-chip Internal Registers (MSB lowest address)
Address (Hex)
Function
Default Value (Hex)
00 to 01 Phase Adjust Register #1, 14-bits, bits 15, 14 don’t care
00 00
02 to 03 Phase Adjust Register #2, 14-bits
00 00
04 to 09 Frequency Tuning Word Number 1, 48-bits
09 18 4e 72 a0 00
0a to 0f Frequency Tuning Word Number 2, 48-bits
00 00 00 00 00 00
10 to 15 Delta Frequency Word, 48-bits
00 00 00 00 00 00
16 to 19 Update Clock, 32-bits
00 00 00 05
1a to 1c Ramp Rate Clock, 20-bits, bits 23, 22, 21, 20 don’t care
00 00 00
1d 4=CMP PD, 3=low, 2=QDAC PD, 1=DAC PD, 0=DIG PD
00
1e 6=PLL RNG, 5=BP PLL, 4-0=REF MULT
4a
1f 7=CLR ACC1, 6=CLR ACC2, 5=TRI, 4=QDAC, 3-1=MODE, 0=IOUD
00
20 6=BP INV SINC, 5=OSK EN, 4=OSK INT
40
21 to 22 Output Shape Key #1 Multiplier, 12-bits, bits 15, 14, 13, 12 don’t care
0f ff
23 to 24 Output Shape Key #2 Multiplier, 12-bits, bits 15, 14, 13, 12 don’t care
0f ff
25 Output Shape Key Ramp Rate, 8-bits
00
26 to 27 QDAC, 12-bits, 2’s complement, bits 15, 14, 13, 12 don’t care
0f ff