7
Note 1 :
Voltage measuerments are with respect to ground,
with a voltmeter (internal resistance : 10MΩ).
4.1.2. Display Block
IC901:C0HBA0000324
4.1.3. BT/USB/AUX Block
IC100:YEAMNF230122
92 X16OUT 16.9344MHz oscillator connec-
tion.
O1.46
93 X16IN 16.9344MHz oscillator connec-
tion.
O1.51
94 XVDD2 Oscillator power supply. - 3.09
95 LRVDD Audio LPF power supply. - 3.09
96 LCHO Audio Lch data output. AO 1.56
97 LRREF Reference voltage for audio LPF. AO 1.56
98 RCHO Audio Rch data output. AO 1.56
99 LRVSS Audio LPF ground. - 0
100 SLCO Slice Level control output. AO 1.61
Pin.
No.
PORT Description I/O (V)
1 P1/S1 General-purpose output. O 4.80
2 P2/S2 General-purpose output. O 4.80
3 P3/S3 General-purpose output. O 4.80
4 P4/S4 Not connected. - 4.82
5 P5/S5 Segment outputs. O 2.42
6 P6/S6 Segment outputs. O 2.42
7 P7/S7 Segment outputs. O 2.42
8 P8/S8 Segment outputs. O 2.42
9 S9 Segment outputs. O 2.42
10 S10 Segment outputs. O 2.42
11 S11 Segment outputs. O 2.42
12 S12 Segment outputs. O 2.42
13 S13 Segment outputs. O 2.42
14 S14 Segment outputs. O 2.42
15 S15 Segment outputs. O 2.42
16 S16 Segment outputs. O 2.42
17 S17 Segment outputs. O 2.42
18 S18 Segment outputs. O 2.42
19 S19 Segment outputs. O 2.42
20 S20 Segment outputs. O 2.42
21 S21 Segment outputs. O 2.42
22 S22 Segment outputs. O 2.42
23 S23 Segment outputs. O 2.42
24 S24 Segment outputs. O 2.42
25 S25 Segment outputs. O 2.42
26 S26 Segment outputs. O 2.42
27 S27 Segment outputs. O 2.42
28 S28 Segment outputs. O 2.42
29 S29 Segment outputs. O 2.42
30 S30 Segment outputs. O 2.42
31 S31 Segment outputs. O 2.42
32 S32 Segment outputs. O 2.42
33 S33 Segment outputs. O 2.42
34 S34 Segment outputs. O 2.42
35 S35 Segment outputs. O 2.42
36 S36 Segment outputs. O 2.42
37 S37 Segment outputs. O 2.42
38 S38 Segment outputs. O 2.42
39 S39 Segment outputs. O 2.42
40 S40 Segment outputs. O 2.42
41 S41 Segment outputs. O 2.42
42 S42 Segment outputs. O 2.42
43 S43 Segment outputs. O 2.42
44 S44 Segment outputs. O 2.42
45 S45 Segment outputs. O 2.42
46 S46 Segment outputs. O 2.42
47 S47 Segment outputs. O 2.42
48 S48 Segment outputs. O 2.42
49 S49 Segment outputs. O 2.42
50 S50 Segment outputs. O 2.42
51 S51 Segment outputs. O 2.42
52 S52 Segment outputs. O 2.42
53 S53 Segment outputs. O 2.42
Pin No. Port Description I/O CD(V)
54 S54 Segment outputs. O 2.42
55 S55 Segment outputs. O 2.42
56 S56 Segment outputs. O 2.42
57 S57 Segment outputs. O 2.42
58 S58 Segment outputs. O 2.42
59 S59 Segment outputs. O 2.42
60 S60 Segment outputs. O 2.42
61 S61 Segment outputs. O 2.42
62 S62 Segment outputs. O 2.42
63 S63 Segment outputs. O 2.42
64 S64 Segment outputs. O 2.42
65 S65 Segment outputs. O 2.42
66 S66 Segment outputs. O 2.42
67 S67 Segment outputs. O 2.42
68 S68 Segment outputs. O 2.42
69 S69 Segment outputs. O 2.42
70 S70 Segment outputs. O 2.42
71 S71 Not connected. - 2.42
72 S72 Not connected. - 2.42
73 S73 Not connected. - 2.42
74 COM4/S74 Common driver outputs. O 2.42
75 COM3 Common driver outputs. O 2.42
76 COM2 Common driver outputs. O 2.42
77 COM1 Common driver outputs. O 2.42
78 S75/KS1 Not connected. - 4.82
79 S76/KS2 Not connected. - 4.82
80 KS3 Key scan outputs. O 4.82
81 KS4 Key scan outputs. O 4.82
82 KS5 Key scan outputs. O 4.82
83 KS6 Key scan outputs. O 4.82
84 KI1 Key scan inputs. I 0
85 KI2 Key scan inputs. I 0
86 KI3 Key scan inputs. I 0
87 KI4 Key scan inputs. I 0
88 KI5 Key scan inputs. I 0
89 S77/P9 General-purpose output port. O 0
90 VDD Power supply connections. - 4.82
91 VDD1 LCD drive 2/3 biasvoltage supply
pin.
-3.22
92 VDD2 LCD drive 1/3 biasvoltage supply
pin.
-1.63
93 VSS Ground. - 0
94 TEST This pin must be connected to
ground.
-0
95 OSC Oscillator circuit port. I/O 3.53
96 RES Reset signal input. I 4.82
97 DO Output data. O 4.76
98 CE Chip enable. I 0
99 CL Synchronization clock. I 4.60
100 DI Transfer data. I 4.55
Pin.
No.
PORT Description I/O (V)
1 UART_CTS UART clear to send active low. I 0
2 UART_RTS UART request to send active low. O 0
3 UART_RX UART data input. I 0
4 UART_TX UART data output. O 3.06
5 VREGIN_L Input to internal low-voltage linear
regulator for non-audio core
circuity.(1.8V-2.7V)
I1.83
6 VDD_MEM VDD VDD 3.05
7 VDD_PIO VDD VDD 3.05
8 GND Ground GND 0
9 RESET# CMOS input with weak internal pull-
up.
I3.58
10 PIO[10] Programmable input/output line. O 0
11 PIO[9] Programmable input/output line. O 0
12 PIO[15] Programmable input/output line. O 0
13 PIO[11] Programmable input/output line. O 0
14 PIO[12] Programmable input/output line. O 0
15 PIO[13] Programmable input/output line. O 0
Pin.
No.
PORT Description I/O (V)
cqrxbt490u.book Page 7 Friday, April 6, 2012 9:48 AM