Panasonic KX-TS2388RUB - Page 23

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KX-TS2388RUB/KX-TS2388RUW/KX-TS2388CAB/KX-TS2388CAW/KX-TS2388UAB/KX-TS2388UAW
10.1.3. EEPROM (IC851)
1. SCL
SCL terminal is input terminal of Serial Clock to control transmit and receipt between Master and Slave.
2. SDA
SDA terminal is input terminal, to forward the address and the mutual data between Master Device and Slave Device the
mutual.
This terminal needs the pull-up resistance external because output circuit of SDA uses Open Drain.
3. A0, A1, A2
A0, A1, and A2 terminal is not used.
4. WP
WP terminal controls writing action. It is possible to do only reading action when high level input and it is possible to do read-
ing and writing action when low level input.
Dout & ACK
(Open drain)
Control logic
Sense amps
Shift resistor
Word address
buffers
Column decorders
Start/Stop
logic
Stage counters
&
Slave address
Comparators
XDEC
Memory array
128 X 128
Data in storage
High voltage
generator &
Timing control
SDA
WP
Vcc
Vss
SCL
A1
A2
128