Panasonic TC-P50VT20

49
12.5. A-Board (1/20) Schematic Diagram
S
S
AH_ED2 AH_ED6 AH_ED4 AH_ED1 AH_ED0 AH_ED7 AH_ED5 AH_ED3
PD_ED1
PD_ED0
PD_ED7
PD_ED6
PD_ED5
PD_ED4
PD_ED3
PD_ED2
AH_ED3
AH_ED4
AH_ED5
AH_ED6
AH_ED7
AH_ED0
AH_ED1
AH_ED2
C8950
16V
0.01u
C8903
16V
0.1u
C8904
16V
0.1u
TVRR439S
*IC8502
1
NC
2
NC
3
NC
4
VSS
5
SDA
6
SCL
7
WC
8
VCC
TVRR440S
IC8501
1
NC
2
NC
3
NC
4
NC
5
NC
6
NC
7
R/B#
8
RE#
9
CE#
10
NC
11
NC
12
VCC
13
VSS
14
NC
15
NC
16
CLE
17
ALE
18
WE#
19
WP#
20
NC
21
NC
22
NC
23
NC
24
NC
25
NC
26
NC
27
NC
28
NC
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC
34
NC
35
NC
36
VSS
37
VCC
38
NC
39
NC
40
NC
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC
46
NC
47
NC
48
NC
SUB3.3V
SUB3.3V
SUB3.3V
SUB3.3V
R8503
R8504
TP8563
PD_XNFWE
PD_XNFWP
PEAKS_SCL1
PD_XNFRE
PD_NFCLE
PD_EVTRG
PD_XNFCE
PD_NFALE
PD_TRST
PD_NFRYBY
PD_TCK
PD_TMS
PD_XIRQ1
PD_TDI
PD_ED[0-15]
PD_HSDOUT6
PEAKS_SDA1
R8918
EXB2HV680JV
R8500
4.7k
R8501
68
R8946
56
R8965
10k
R8963
10k
R8975
10k
R9014
10k
R8972
10k
R8948
56
R8949
56
R8951
2.2k
R8945
56
R8947
56
R8944
56
R8952
10k
R8973
10k
R8950
56
PEAKS-LDA2
PEAKS-LDA2
DEBUG CONNECTOR
JTAG
EEPROM
PORT5[7]EEPROM_WP
IIC1
B
743
A
E
C
F
D
91 6825
1Gbit NAND_FLASH
!
LDA2_ROM,SPCA-BOARD TXN/A1LSUUS (1/20)
EEPROM
TO 17/20
TO 17/20
TO 2,17/20
TO 17/20
TO 17/20
TO 17/20
TO 2,8,12/20
TO 17/20